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* Do not duplicate method name in comment, remove duplicate commentMatthias Braun2015-07-161-3/+0
| | | | llvm-svn: 242430
* Rename LoopInfo::Analyze() to LoopInfo::analyze() and turn its parameter ↵Cong Hou2015-07-161-1/+1
| | | | | | | | | | type to const&. The benefit of turning the parameter of LoopInfo::analyze() to const& is that it now can accept a rvalue. http://reviews.llvm.org/D11250 llvm-svn: 242426
* [Codegen] Add intrinsics 'absdiff' and corresponding SDNodes for absolute ↵James Molloy2015-07-166-0/+50
| | | | | | | | | | | | | difference operation This adds new intrinsics "*absdiff" for absolute difference ops to facilitate efficient code generation for "sum of absolute differences" operation. The patch also contains the introduction of corresponding SDNodes and basic legalization support.Sanity of the generated code is tested on X86. This is 1st of the three patches. Patch by Shahid Asghar-ahmad! llvm-svn: 242409
* Move most user of TargetMachine::getDataLayout to the Module oneMehdi Amini2015-07-1610-118/+114
| | | | | | | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. This patch is quite boring overall, except for some uglyness in ASMPrinter which has a getDataLayout function but has some clients that use it without a Module (llmv-dsymutil, llvm-dwarfdump), so some methods are taking a DataLayout as parameter. Reviewers: echristo Subscribers: yaron.keren, rafael, llvm-commits, jholewinski Differential Revision: http://reviews.llvm.org/D11090 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 242386
* Remove DataLayout from TargetLoweringObjectFile, redirect to ModuleMehdi Amini2015-07-163-27/+26
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: yaron.keren, rafael, llvm-commits, jholewinski Differential Revision: http://reviews.llvm.org/D11079 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 242385
* Redirect pointerSize query to the TargetMachine in ASMPrinterMehdi Amini2015-07-162-8/+12
| | | | | | | | | | | | | | | | | | | Summary: Because llvm-dsymutil is using ASMPrinter without any MachineFunction of Module available. This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: yaron.keren, rafael, llvm-commits Differential Revision: http://reviews.llvm.org/D11078 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 242384
* MIR Serialization: Serialize the jump table index operands.Alex Lorenz2015-07-156-5/+50
| | | | | Reviewers: Duncan P. N. Exon Smith llvm-svn: 242358
* MIR Serialization: Serialize the jump table info.Alex Lorenz2015-07-152-1/+51
| | | | | | | | | | | | | | The jump table info is serialized using a YAML mapping that contains its kind and a YAML sequence of jump table entries. A jump table entry is a YAML mapping that has an ID and an inline YAML sequence of machine basic block references. The testcase 'CodeGen/MIR/X86/jump-table-info.mir' doesn't have any instructions because one of them contains a jump table index operand. The jump table index operands will be serialized in a follow up patch, and the appropriate instructions will be added to this testcase. Reviewers: Duncan P. N. Exon Smith llvm-svn: 242357
* Create a wrapper pass for BranchProbabilityInfo.Cong Hou2015-07-151-3/+4
| | | | | | | | This new wrapper pass is useful when we want to do branch probability analysis conditionally (e.g. only in PGO mode) but don't want to add one more pass dependence. http://reviews.llvm.org/D11241 llvm-svn: 242349
* TargetRegisterInfo: Provide a way to check assigned registers in ↵Matthias Braun2015-07-155-7/+11
| | | | | | | | | | getRegAllocationHints() Pass a const reference to LiveRegMatrix to getRegAllocationHints() because some targets can prodive better hints if they can test whether a physreg has been used for register allocation yet. llvm-svn: 242340
* MIR Serialization: Serialize references from the stack objects to named allocas.Alex Lorenz2015-07-152-6/+21
| | | | | | | | | This commit serializes the references to the named LLVM alloca instructions from the stack objects in the machine frame info. This commit adds a field 'Name' to the struct 'yaml::MachineStackObject'. This new field is used to store the name of the alloca instruction when the alloca is present and when it has a name. llvm-svn: 242339
* Add a "debugger tuning" concept that allows us to fine-tune how wePaul Robinson2015-07-152-10/+71
| | | | | | | | | | | emit debug info, according to the preferences of the different debuggers used on various targets. Darwin and FreeBSD default to tuning for LLDB; PS4 defaults to tuning for the SCE (Sony Computer Entertainment) debugger. All others default to GDB. Differential Revision: http://reviews.llvm.org/D8506 llvm-svn: 242338
* Rename doFunction() in BFI to calculate() and change its parameters from ↵Cong Hou2015-07-151-1/+1
| | | | | | | | pointers to references. http://reviews.llvm.org/D11196 llvm-svn: 242322
* Revert "Refactor optimizeUncoalescable logic"Bruno Cardoso Lopes2015-07-151-246/+127
| | | | | | | | | | Likely broke compilation on ARM: http://lab.llvm.org:8011/builders/clang-native-arm-lnt/builds/13054 This reverts commit 0b7824464fbe3d3f386e2d4aef6a431422709e53. llvm-svn: 242311
* Revert "Look through PHIs to find additional register sources"Bruno Cardoso Lopes2015-07-151-265/+82
| | | | | | | | | | Likely broke compilation on ARM: http://lab.llvm.org:8011/builders/clang-native-arm-lnt/builds/13054 This reverts commit 131ce4a838c081516cbfed039fc986b33e3979d6. llvm-svn: 242310
* Test commit.Cong Hou2015-07-151-1/+0
| | | | | | This is a test commit (one blank line deleted). llvm-svn: 242308
* Debug Info: Add basic support for external types references.Adrian Prantl2015-07-154-3/+28
| | | | | | | | | | | | | | This is a necessary prerequisite for bootstrapping the emission of debug info inside modules. - Adds a FlagExternalTypeRef to DICompositeType. External types must have a unique identifier. - External type references are emitted using a forward declaration with a DW_AT_signature([DW_FORM_ref_sig8]) based on the UID. http://reviews.llvm.org/D9612 llvm-svn: 242302
* Look through PHIs to find additional register sourcesBruno Cardoso Lopes2015-07-151-82/+265
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Teaches the ValueTracker in the PeepholeOptimizer to look through PHI instructions. - Add findNextSourceAndRewritePHI method to lookup into multiple sources returnted by the ValueTracker and rewrite PHIs with new sources. With these changes we can find more register sources and rewrite more copies to allow coaslescing of bitcast instructions. Hence, we eliminate unnecessary VR64 <-> GR64 copies in x86, but it could be extended to other archs by marking "isBitcast" on target specific instructions. The x86 example follows: A: psllq %mm1, %mm0 movd %mm0, %r9 jmp C B: por %mm1, %mm0 movd %mm0, %r9 jmp C C: movd %r9, %mm0 pshufw $238, %mm0, %mm0 Becomes: A: psllq %mm1, %mm0 jmp C B: por %mm1, %mm0 jmp C C: pshufw $238, %mm0, %mm0 Differential Revision: http://reviews.llvm.org/D11197 rdar://problem/20404526 llvm-svn: 242295
* Refactor optimizeUncoalescable logicBruno Cardoso Lopes2015-07-151-127/+246
| | | | | | | | | | | | | | | - Create a new CopyRewriter for Uncoalescable copy-like instructions - Change the ValueTracker to return a ValueTrackerResult This makes optimizeUncoalescable looks more like optimizeCoalescable and use the CopyRewritter infrastructure. This is also the preparation for looking up into PHI nodes in the ValueTracker. Differential Revision: http://reviews.llvm.org/D11195 llvm-svn: 242294
* [SDAG] Optimize unordered comparison in soft-float mode (patch by Anton ↵Alexey Bataev2015-07-151-23/+31
| | | | | | | | | | | Nadolskiy) Current implementation handles unordered comparison poorly in soft-float mode. Consider (a ULE b) which is a <= b. It is lowered to (ledf2(a, b) <= 0 || unorddf2(a, b) != 0) (in general). We can do better job by lowering it to (__gtdf2(a, b) <= 0). Such replacement is true for other CMP's (ult, ugt, uge). In general, we just call same function as for ordered case but negate comparison against zero. Differential Revision: http://reviews.llvm.org/D10804 llvm-svn: 242280
* [MachineCombiner] Work with itinerariesHal Finkel2015-07-151-4/+9
| | | | | | | | | | | | MachineCombiner predicated its use of scheduling-based metrics on hasInstrSchedModel(), but useful conclusions can be drawn from pipeline itineraries as well. Almost all of the logic (except for resource tracking in preservesResourceLen) can be used if we have an itinerary, so enable it in that case as well. This will be used by the PowerPC backend in an upcoming commit. llvm-svn: 242277
* Use enum instead of unsigned. NFC.Pete Cooper2015-07-152-2/+4
| | | | | | | | The unsigned opcode argument here was the result of BinaryOperator->getOpcode(). That returns a BinaryOps enum which is more accurate than passing around an unsigned. llvm-svn: 242265
* Use cast<> instead of dyn_cast to remove llvm_unreachable. NFC.Pete Cooper2015-07-151-4/+2
| | | | | | | | | | This code was checking if we are an ICmpInst or FCmpInst then throwing unreachable if we are neither. We must be one or the other, so use a cast on the FCmpInst case to ensure that we are that case. Then we can avoid having an unreachable but still catch an error if we ever had another subclass of CmpInst. llvm-svn: 242264
* Use another foreach loop. NFCPete Cooper2015-07-151-2/+1
| | | | llvm-svn: 242263
* Use getAnyExtOrTrunc helper instead of manually doing ext/trunc check. NFC.Pete Cooper2015-07-151-14/+5
| | | | | | | The code here was doing exactly what is already in getAnyExtOrTrunc(). Just use that method instead. llvm-svn: 242261
* Use getZExtOrTrunc helper instead of manually doing zext/trunc check. NFC.Pete Cooper2015-07-152-4/+2
| | | | | | | The code here was doing exactly what is already in getZExtOrTrunc(). Just use that method instead. llvm-svn: 242260
* Use getStoreSize() instead of getStoreSizeInBits()/8. NFC.Pete Cooper2015-07-151-2/+1
| | | | | | | | The calls here were both to getStoreSizeInBits() which multiplies by 8. We then immediately divided by 8. Calling getStoreSize() returns the values we need without the extra arithmetic. llvm-svn: 242254
* Use more foreach loops in SelectionDAG. NFCPete Cooper2015-07-143-40/+37
| | | | llvm-svn: 242249
* Add allnodes() iterator range to SelectionDAG. NFC.Pete Cooper2015-07-142-9/+6
| | | | | | | | | | | SelectionDAG already had begin/end methods for iterating over all the nodes, but didn't define an iterator_range for us in foreach loops. This adds such a method and uses it in some of the eligible places throughout the backends. llvm-svn: 242212
* Constify parameters in SelectionDAG methods. NFCPete Cooper2015-07-141-3/+3
| | | | llvm-svn: 242210
* Remove unnecessary .getNode() in SelectionDAG. NFC.Pete Cooper2015-07-141-22/+20
| | | | | | | | The simplify_type specialisation allows us to cast directly from SDValue to an SDNode* subclass so we don't need to pass a SDNode* to cast<>. llvm-svn: 242209
* Use more foreach loops in SelectionDAG. NFCPete Cooper2015-07-141-7/+6
| | | | llvm-svn: 242208
* MIR Serialization: Serialize the machine basic block live in registers.Alex Lorenz2015-07-144-1/+44
| | | | llvm-svn: 242204
* MIR Printer: move the function 'printReg'. NFC.Alex Lorenz2015-07-141-13/+13
| | | | | | | | This commit moves the function 'printReg' towards the start of the file so that it can be used by the conversion methods in MIRPrinter and not just the printing methods in MIPrinter. llvm-svn: 242203
* [CodeGen] Force emission of personality directive if explicitly specifiedKeno Fischer2015-07-145-22/+57
| | | | | | | | | | | | | | | | | | | Summary: Before this change, personality directives were not emitted if there was no invoke left in the function (of course until recently this also meant that we couldn't know what the personality actually was). This patch forces personality directives to still be emitted, unless it is known to be a noop in the absence of invokes, or the user explicitly specified `nounwind` (and not `uwtable`) on the function. Reviewers: majnemer, rnk Subscribers: rnk, llvm-commits Differential Revision: http://reviews.llvm.org/D10884 llvm-svn: 242185
* MachineRegisterInfo: Remove UsedPhysReg infrastructureMatthias Braun2015-07-146-100/+8
| | | | | | | | | | | | | We have a detailed def/use lists for every physical register in MachineRegisterInfo anyway, so there is little use in maintaining an additional bitset of which ones are used. Removing it frees us from extra book keeping. This simplifies VirtRegMap. Differential Revision: http://reviews.llvm.org/D10911 llvm-svn: 242173
* RAGreedy: Keep track of allocated PhysRegs internallyMatthias Braun2015-07-142-18/+32
| | | | | | | | | | | Do not use MachineRegisterInfo::setPhysRegUsed()/isPhysRegUsed() anymore. This bitset changes function-global state and is set by the VirtRegRewriter anyway. Simply use a bitvector private to RAGreedy. Differential Revision: http://reviews.llvm.org/D10910 llvm-svn: 242169
* PrologEpilogInserter: Rewrite API to determine callee save regsiters.Matthias Braun2015-07-143-27/+92
| | | | | | | | | | | | | | | | This changes TargetFrameLowering::processFunctionBeforeCalleeSavedScan(): - Rename the function to determineCalleeSaves() - Pass a bitset of callee saved registers by reference, thus avoiding the function-global PhysRegUsed bitset in MachineRegisterInfo. - Without PhysRegUsed the implementation is fine tuned to not save physcial registers which are only read but never modified. Related to rdar://21539507 Differential Revision: http://reviews.llvm.org/D10909 llvm-svn: 242165
* Revert "LegalizeDAG: Fix and improve FCOPYSIGN/FABS legalization"Matthias Braun2015-07-141-150/+74
| | | | | | | | Accidental commit, needs review first. This reverts commit r242107. llvm-svn: 242108
* LegalizeDAG: Fix and improve FCOPYSIGN/FABS legalizationMatthias Braun2015-07-141-74/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Factor out code to query and modify the sign bit of a floatingpoint value as an integer. This also works if none of the targets integer types is big enough to hold all bits of the floatingpoint value. - Legalize FABS(x) as FCOPYSIGN(x, 0.0) if FCOPYSIGN is available, otherwise perform bit manipulation on the sign bit. The previous code used "x >u 0 ? x : -x" which is incorrect for x being -0.0! It also takes 34 instructions on ARM Cortex-M4. With this patch we only require 5: vldr d0, LCPI0_0 vmov r2, r3, d0 lsrs r2, r3, #31 bfi r1, r2, #31, #1 bx lr (This could be further improved if the compiler would recognize that r2, r3 is zero). - Only lower FCOPYSIGN(x, y) = sign(x) ? -FABS(x) : FABS(x) if FABS is available otherwise perform bit manipulation on the sign bit. - Perform the sign(x) test by masking out the sign bit and comparing with 0 rather than shifting the sign bit to the highest position and testing for "<s 0". For x86 copysignl (on 80bit values) this gets us: testl $32768, %eax rather than: shlq $48, %rax sets %al testb %al, %al llvm-svn: 242107
* MIR Serialization: Serialize the variable sized stack objects.Alex Lorenz2015-07-142-4/+11
| | | | llvm-svn: 242095
* MIR Serialization: Serialize the sub register indices.Alex Lorenz2015-07-134-3/+53
| | | | | | | | This commit serializes the sub register indices from the register machine operands. Reviewers: Duncan P. N. Exon Smith llvm-svn: 242084
* [WinEH] Emit the LSDA even if no lpads remain but outlining occurredReid Kleckner2015-07-131-6/+14
| | | | | | | | | | | | | | | The outlined funclets call intrinsics which reference labels from the LSDA. This situation can easily arise in small functions with a single cleanup at -O0, where Clang marks a definition as nounwind, and then WinEHPrepare "discovers" that the landingpad is dead by accident and deletes it. We now need to ask the LLVM IR Function for it's personality directly, rather than going through MachineModuleInfo. Fixes PR23892. llvm-svn: 242063
* Service the doxygen comments in DwarfUnit and DwarfDebug.Adrian Prantl2015-07-132-148/+151
| | | | llvm-svn: 242046
* MIR Serialization: Serialize the fixed stack objects.Alex Lorenz2015-07-132-1/+36
| | | | | | | | | | | | | This commit serializes the fixed stack objects, including fixed spill slots. The fixed stack objects are serialized using a YAML sequence of YAML inline mappings. Each mapping has the object's ID, type, size, offset, and alignment. The objects that aren't spill slots also serialize the isImmutable and isAliased flags. The fixed stack objects are a part of the machine function's YAML mapping. Reviewers: Duncan P. N. Exon Smith llvm-svn: 242045
* Remove macro guards for extern template instantiations.Benjamin Kramer2015-07-131-2/+2
| | | | | | | This is a C++11 feature that both GCC and MSVC have supported as ane extension long before C++11 was approved. llvm-svn: 242042
* Fix handling of the 'n' asm constraint with invalid operands.James Y Knight2015-07-131-2/+2
| | | | | | | | | | It had accidently accepted a symbol+offset value (and emitted incorrect code for it, keeping only the offset part) instead of properly reporting the constraint as invalid. Differential Revision: http://reviews.llvm.org/D11039 llvm-svn: 242040
* Print the visibility of available_externally functions.Rafael Espindola2015-07-131-1/+1
| | | | | | We were already printing it for declarations, but not available_externally. llvm-svn: 242027
* MIR Serialization: Serialize the virtual register operands.Alex Lorenz2015-07-106-13/+47
| | | | | | | | Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D11005 llvm-svn: 241959
* [SEH] Push reloads of the SEH code past phi nodesReid Kleckner2015-07-101-6/+28
| | | | | | | | | | | This in turn would sometimes introduce new cleanupblocks that didn't previously exist. The uses were being introduced by SSA value demotion. We actually want to *promote* uses of EH pointers and selectors, so I added some spcecial casing to avoid demoting such instructions. This is getting overly complicated, but hopefully we'll come along and delete it in the new representation. llvm-svn: 241950
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