summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
Commit message (Collapse)AuthorAgeFilesLines
* Always emit DW_AT_declaration attribute when the variable isn't a definition.Frederic Riss2014-09-181-3/+3
| | | | | | | | | | | | | | | Summary: This doesn't show up today as we don't emit decalration only variables. This will be tested when the followup patches implementing import of forward declared entities lands in clang. Reviewers: echristo, dblaikie, aprantl Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D5382 llvm-svn: 218041
* Add a new pass FunctionTargetTransformInfo. This pass serves as aEric Christopher2014-09-181-3/+3
| | | | | | | | | | | shim between the TargetTransformInfo immutable pass and the Subtarget via the TargetMachine and Function. Migrate a single call from BasicTargetTransformInfo as an example and provide shims where TargetMachine begins taking a Function to determine the subtarget. No functional change. llvm-svn: 218004
* [X86] Use the generic AtomicExpandPass instead of X86AtomicExpandPassRobin Morisset2014-09-171-52/+133
| | | | | | | | | | | | This required a new hook called hasLoadLinkedStoreConditional to know whether to expand atomics to LL/SC (ARM, AArch64, in a future patch Power) or to CmpXchg (X86). Apart from that, the new code in AtomicExpandPass is mostly moved from X86AtomicExpandPass. The main result of this patch is to get rid of that pass, which had lots of code duplicated with AtomicExpandPass. llvm-svn: 217928
* [CodeGenPrepare][AddressingModeMatcher] The promotion mechanism was expectingQuentin Colombet2014-09-161-45/+55
| | | | | | instructions when truncate, sext, or zext were created. Fix that. llvm-svn: 217926
* Add back a fallback case for targets that do not or cannot implement ↵Owen Anderson2014-09-161-1/+5
| | | | | | getNoopForMachoTarget(). llvm-svn: 217899
* Fix BasicTTI::getCmpSelInstrCost to deal with illegal vector typesHal Finkel2014-09-161-1/+2
| | | | | | | | | | | | | | | | | | | The default implementation of getCmpSelInstrCost, which provides the cost of icmp/fcmp/select instructions, did not deal sensibly with illegal vector types that were scalarized. We'd ask for the legalization cost of the vector type, which would return something like (4, f64) given an input of <4 x double>, and we'd then check the TLI status of the ISD opcode on that scalar type. This would result in querying (ISD::VSELECT, f64), for example. Amusingly enough, ISD::VSELECT on scalar types is marked as Legal by default (as with most other operations), and most backends never change this because VSELECT is never generated on scalars. However, seeing the resulting operation as Legal, we'd neglect to add the scalarization cost before returning. The result is that we'd grossly under-estimate the cost of cmps/selects on illegal vector types. Now, if type legalization clearly results in scalarization, we skip the early return and add the scalarization cost. llvm-svn: 217859
* DebugInfo: Add comment describing the need to disable address pool usage in ↵David Blaikie2014-09-151-0/+5
| | | | | | | | skeleton units. Post commit review from Eric Christopher. llvm-svn: 217842
* Replace repeated null checks with an assert. NFC.Sanjay Patel2014-09-151-18/+14
| | | | | | | Without a vector to hold the created ops, these functions don't have any use. llvm-svn: 217831
* [FastISel] Move optimizeCmpPredicate to FastISel base class. NFC.Juergen Ributzka2014-09-151-0/+40
| | | | | | Make the optimizeCmpPredicate function available to all targets. llvm-svn: 217822
* Replace dead links to "Hacker's Delight" with general references. NFC.Sanjay Patel2014-09-153-10/+10
| | | | llvm-svn: 217814
* Fix a lot of confusion around inserting nops on empty functions.Rafael Espindola2014-09-152-15/+7
| | | | | | | | | | | | | | | | On MachO, and MachO only, we cannot have a truly empty function since that breaks the linker logic for atomizing the section. When we are emitting a frame pointer, the presence of an unreachable will create a cfi instruction pointing past the last instruction. This is perfectly fine. The FDE information encodes the pc range it applies to. If some tool cannot handle this, we should explicitly say which bug we are working around and only work around it when it is actually relevant (not for ELF for example). Given the unreachable we could omit the .cfi_def_cfa_register, but then again, we could also omit the entire function prologue if we wanted to. llvm-svn: 217801
* [CodeGenPrepare][AddressingModeMatcher] Fix a think-o for the sext(zext) -> ↵Quentin Colombet2014-09-151-7/+9
| | | | | | | | | | | zext promotion introduced in r217629. We were returning the old sext instead of the new zext as the promoted instruction! Thanks Joerg Sonnenberger for the test case. llvm-svn: 217800
* In DwarfEHPrepare, after all passes are run, RewindFunction may be a danglingYaron Keren2014-09-141-0/+5
| | | | | | | pointer to a dead function. To make sure it's valid, doFinalization nullptrs RewindFunction just like the constructor and so it will be found on next run. llvm-svn: 217737
* Allow targets to custom legalize vector insertion and extraction.Owen Anderson2014-09-121-0/+8
| | | | llvm-svn: 217711
* Remove an unnecessary restriction. MIsNeedChainEdge() should be checked ↵Owen Anderson2014-09-121-1/+1
| | | | | | | | | even when scheduler AliasAnalysis is not enabled. A good chunk of the MIsNeedChainEdge() is logic that is valid and should be applied even for targets that are not using for alias analysis. llvm-svn: 217706
* Legalizer: Use the scalar bit width when promoting bit counting instrs onBenjamin Kramer2014-09-121-5/+6
| | | | | | | | | vectors. e.g. when promoting ctlz from <2 x i32> to <2 x i64> we have to fixup the result by 32 bits, not 64. PR20917. llvm-svn: 217671
* [CodeGenPrepare] Teach the addressing mode matcher how to promote zext.Quentin Colombet2014-09-111-13/+56
| | | | | | I.e., teach it about 'sext (zext a to ty) to ty2' => zext a to ty2. llvm-svn: 217629
* Remove the unused string section symbol parameter from DwarfFile::emitStringsDavid Blaikie2014-09-119-61/+43
| | | | | | | | | | | | | | | | | | | And since it /looked/ like the DwarfStrSectionSym was unused, I tried removing it - but then it turned out that DwarfStringPool was reconstructing the same label (and expecting it to have already been emitted) and uses that. So I kept it around, but wanted to pass it in to users - since it seemed a bit silly for DwarfStringPool to have it passed in and returned but itself have no use for it. The only two users don't handle strings in both .dwo and .o files so they only ever need the one symbol - no need to keep it (and have an unused symbol) in the DwarfStringPool used for fission/.dwo. Refactor a bunch of accelerator table usage to remove duplication so I didn't have to touch 4-5 callers. llvm-svn: 217628
* Add DAG combine for shl + add of constants.Matt Arsenault2014-09-111-32/+12
| | | | | | | | | | | | | | Do (shl (add x, c1), c2) -> (add (shl x, c2), c1 << c2) This is already done for multiplies, but since multiplies by powers of two are turned into shifts, we also need to handle it here. This might want checks for isLegalAddImmediate to avoid transforming an add of a legal immediate with one that isn't. llvm-svn: 217610
* Combine fmul vector FP constants when unsafe math is allowed.Sanjay Patel2014-09-111-6/+22
| | | | | | | | | | | | | | | | | | | This is an extension of the change made with r215820: http://llvm.org/viewvc/llvm-project?view=revision&revision=215820 That patch allowed combining of splatted vector FP constants that are multiplied. This patch allows combining non-uniform vector FP constants too by relaxing the check on the type of vector. Also, canonicalize a vector fmul in the same way that we already do for scalars - if only one operand of the fmul is a constant, make it operand 1. Otherwise, we miss potential folds. This fold is also done by -instcombine, but it's possible that extra fmuls may have been generated during lowering. Differential Revision: http://reviews.llvm.org/D5254 llvm-svn: 217599
* Build correct vector filled with undef nodesDavid Xu2014-09-111-4/+20
| | | | llvm-svn: 217570
* Cleanup: Use the appropriate API for accessing the DIVariable of aAdrian Prantl2014-09-101-1/+1
| | | | | | DBG_VALUE intrinsic. llvm-svn: 217533
* Rename getMaximumUnrollFactor -> getMaxInterleaveFactor; also rename option ↵Sanjay Patel2014-09-101-2/+2
| | | | | | | | | | | names controlling this variable. "Unroll" is not the appropriate name for this variable. Clang already uses the term "interleave" in pragmas and metadata for this. Differential Revision: http://reviews.llvm.org/D5066 llvm-svn: 217528
* [asan-assembly-instrumentation] Added CFI directives to the generated ↵Yuri Gorshenin2014-09-101-0/+5
| | | | | | | | | | | | | | instrumentation code. Summary: [asan-assembly-instrumentation] Added CFI directives to the generated instrumentation code. Reviewers: eugenis Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D5189 llvm-svn: 217482
* Sink PrevCU updating into DwarfUnit::addRange to ensure consistencyDavid Blaikie2014-09-094-6/+8
| | | | | | | | | So that the two operations in DwarfDebug couldn't get separated (because I accidentally separated them in some work in progress), put them together. While we're here, move DwarfUnit::addRange to DwarfCompileUnit, since it's not relevant to type units. llvm-svn: 217468
* Remove DwarfDebug::PrevSection, PrevCU is sufficient for handling address ↵David Blaikie2014-09-093-15/+3
| | | | | | | | | | | | | range holes. PrevSection/PrevCU are used to detect holes in the address range of a CU to ensure the DW_AT_ranges does not include those holes. When we see a function with no debug info, though it may be in the same range as the prior and subsequent functions, there should be a gap in the CU's ranges. By setting PrevCU to null in that case, the range would not be extended to cover the gap. llvm-svn: 217466
* [MachineSinking] Conservatively clear kill flags after coalescing.Patrik Hagglund2014-09-091-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This solves the problem of having a kill flag inside a loop with a definition of the register prior to the loop: %vreg368<def> ... Inside loop: %vreg520<def> = COPY %vreg368 %vreg568<def,tied1> = add %vreg341<tied0>, %vreg520<kill> => was coalesced into => %vreg568<def,tied1> = add %vreg341<tied0>, %vreg368<kill> MachineVerifier then complained: *** Bad machine code: Virtual register killed in block, but needed live out. *** The kill flag for %vreg368 is incorrect, and is cleared by this patch. This is similar to the clearing done at the end of MachineSinking::SinkInstruction(). Patch provided by Jonas Paulsson. Reviewed by Quentin Colombet and Juergen Ributzka. llvm-svn: 217427
* Fast-ISel: Remove dead code after falling back from selecting call ↵Hans Wennborg2014-09-081-15/+10
| | | | | | | | | | | | | | | | | instructions (PR20863) Previously, fast-isel would not clean up after failing to select a call instruction, because it would have called flushLocalValueMap() which moves the insertion point, making SavedInsertPt in selectInstruction() invalid. Fixing this by making SavedInsertPt a member variable, and having flushLocalValueMap() update it. This removes some redundant code at -O0, and more importantly fixes PR20863. Differential Revision: http://reviews.llvm.org/D5249 llvm-svn: 217401
* Group unsafe fmul math folds together for easier reading. No functional change.Sanjay Patel2014-09-081-6/+10
| | | | llvm-svn: 217399
* Fix the FIXME that was just added in r217390 - remove a bunch of redundant ↵Sanjay Patel2014-09-081-43/+2
| | | | | | | | fold permutations. The testcases for these folds already exist in test/CodeGen/X86/fp-fast.ll. llvm-svn: 217393
* group unsafe math folds together for easier readingSanjay Patel2014-09-081-150/+142
| | | | | | Also added a FIXME regarding redundant folds for non-canonicalized constants. llvm-svn: 217390
* [AArch64] Improve AA to remove unneeded edges in the AA MI scheduling graph.Chad Rosier2014-09-081-0/+9
| | | | | | | Patch by Sanjin Sijaric <ssijaric@codeaurora.org>! Phabricator Review: http://reviews.llvm.org/D5103 llvm-svn: 217371
* DebugInfo: Do not use DW_FORM_GNU_addr_index in skeleton CUs, GDB 7.8 errors ↵David Blaikie2014-09-071-1/+1
| | | | | | | | | | on this. It's probably not a huge deal to not do this - if we could, maybe the address could be reused by a subprogram low_pc and avoid an extra relocation, but it's just one per CU at best. llvm-svn: 217338
* Allow vector fsub ops with constants to get the same optimizations as scalars.Sanjay Patel2014-09-051-2/+2
| | | | | | | | This problem is bigger than just fsub, but this is the minimum fix to solve fneg for PR20556 ( http://llvm.org/bugs/show_bug.cgi?id=20556 ), and we solve zero subtraction with the same change. llvm-svn: 217286
* clean up; NFCSanjay Patel2014-09-051-2/+2
| | | | llvm-svn: 217278
* Revert "Disable the fix for pr20793 because of a gnu ld bug."Rafael Espindola2014-09-051-11/+0
| | | | | | | | | | This reverts commit r217211. Both the bfd ld and gold outputs were valid. They were using a Rela relocation, so the value present in the relocated location was not used, which caused me to misread the output. llvm-svn: 217264
* Set the parent pointer of cloned DBG_VALUE instructions correctly.Adrian Prantl2014-09-051-1/+1
| | | | | | | | | | | | | | | | | | Fixes PR20523. When spilling variables onto the stack, spillVirtReg() is setting the parent pointer of the cloned DBG_VALUE intrinsic for the stack location to the parent pointer of the original intrinsic. MachineInstr parent pointers should however always point to the parent basic block. MBB is shadowing the MBB member variable. The instruction still ends up being inserted into the right basic block, because it's inserted after MI which serves as the iterator. I failed at constructing a reliable testcase for this, see http://llvm.org/bugs/show_bug.cgi?id=20523 for a large testcases. llvm-svn: 217260
* Disable the fix for pr20793 because of a gnu ld bug.Rafael Espindola2014-09-051-0/+11
| | | | llvm-svn: 217211
* Refactor to avoid code duplication. NFC.Rafael Espindola2014-09-051-34/+25
| | | | llvm-svn: 217207
* Fix pr20793.Rafael Espindola2014-09-041-24/+48
| | | | | | With this patch the third field of llvm.global_ctors is also used on ELF. llvm-svn: 217202
* MC Win64: Put unwind info for COMDAT code into the same COMDAT groupReid Kleckner2014-09-041-19/+4
| | | | | | | | | | | | | | | | | Summary: This fixes a long standing issue where we would emit many little .text sections and only one .pdata and .xdata section. Now we generate one .pdata / .xdata pair per .text section and associate them correctly. Fixes PR19667. Reviewers: majnemer Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D5181 llvm-svn: 217176
* Revert r216803 "[MachineSinking] Clear kill flag of all operands at all ↵Juergen Ributzka2014-09-041-13/+3
| | | | | | | | | their uses." This reverts commit r216803, because it might have broken the buildbot. The issue is tracked in PR20842. llvm-svn: 217120
* Refactor AtomicExpandPass and add a generic isAtomic() method to InstructionRobin Morisset2014-09-031-30/+31
| | | | | | | | | | | | | | | | | | | | | Summary: Split shouldExpandAtomicInIR() into different versions for Stores/Loads/RMWs/CmpXchgs. Makes runOnFunction cleaner (no more redundant checking/casting), and will help moving the X86 backend to this pass. This requires a way of easily detecting which instructions are atomic. I followed the pattern of mayReadFromMemory, mayWriteOrReadMemory, etc.. in making isAtomic() a method of Instruction implemented by a switch on the opcodes. Test Plan: make check Reviewers: jfb Subscribers: mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D5035 llvm-svn: 217080
* Use target-dependent emitLeading/TrailingFence instead of the ↵Robin Morisset2014-09-031-51/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | target-independent insertLeading/TrailingFence (in AtomicExpandPass) Fixes two latent bugs: - There was no fence inserted before expanded seq_cst load (unsound on Power) - There was only a fence release before seq_cst stores (again unsound, in particular on Power) It is not even clear if this is correct on ARM swift processors (where release fences are DMB ishst instead of DMB ish). This behaviour is currently preserved on ARM Swift as it is not clear whether it is incorrect. I would love to get documentation stating whether it is correct or not. These two bugs were not triggered because Power is not (yet) using this pass, and these behaviours happen to be (mostly?) working on ARM (although they completely butchered the semantics of the llvm IR). See: http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-August/075821.html for an example of the problems that can be caused by the second of these bugs. I couldn't see a way of fixing these in a completely target-independent way without adding lots of unnecessary fences on ARM, hence the target-dependent parts of this patch. This patch implements the new target-dependent parts only for ARM (the default of not doing anything is enough for AArch64), other architectures will use this infrastructure in later patches. llvm-svn: 217076
* [FastISel][tblgen] Rename tblgen generated FastISel functions. NFC.Juergen Ributzka2014-09-031-50/+50
| | | | | | | | | | This is the final round of renaming. This changes tblgen to emit lower-case function names for FastEmitInst_* and FastEmit_*, and updates all its uses in the source code. Reviewed by Eric llvm-svn: 217075
* [FastISel] Rename public visible FastISel functions. NFC.Juergen Ributzka2014-09-032-46/+44
| | | | | | | | | | | | | | | | | | | | | This commit renames the following public FastISel functions: LowerArguments -> lowerArguments SelectInstruction -> selectInstruction TargetSelectInstruction -> fastSelectInstruction FastLowerArguments -> fastLowerArguments FastLowerCall -> fastLowerCall FastLowerIntrinsicCall -> fastLowerIntrinsicCall FastEmitZExtFromI1 -> fastEmitZExtFromI1 FastEmitBranch -> fastEmitBranch UpdateValueMap -> updateValueMap TargetMaterializeConstant -> fastMaterializeConstant TargetMaterializeAlloca -> fastMaterializeAlloca TargetMaterializeFloatZero -> fastMaterializeFloatZero LowerCallTo -> lowerCallTo Reviewed by Eric llvm-svn: 217074
* Remove resetSubtargetFeatures as it is unused.Eric Christopher2014-09-031-3/+0
| | | | llvm-svn: 217071
* [FastISel] Some long overdue spring cleaning of FastISel.Juergen Ributzka2014-09-031-378/+333
| | | | | | | | | | | | | Things got a little bit messy over the years and it is time for a little bit spring cleaning. This first commit is focused on the FastISel base class itself. It doxyfies all comments, C++11fies the code where it makes sense, renames internal methods to adhere to the coding standard, and clang-formats the files. Reviewed by Eric llvm-svn: 217060
* Reinstate "Nuke the old JIT."Eric Christopher2014-09-026-42/+4
| | | | | | | | Approved by Jim Grosbach, Lang Hames, Rafael Espindola. This reinstates commits r215111, 215115, 215116, 215117, 215136. llvm-svn: 216982
* Add pass-manager flags to use CFL AAHal Finkel2014-09-021-0/+6
| | | | | | | Add -use-cfl-aa (and -use-cfl-aa-in-codegen) to add CFL AA in the default pass managers (for easy testing). llvm-svn: 216978
OpenPOWER on IntegriCloud