diff options
| author | Sanjay Patel <spatel@rotateright.com> | 2014-09-08 20:16:42 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2014-09-08 20:16:42 +0000 |
| commit | 394c333e3e672a3c5844ba32a449fdd25e43f1d4 (patch) | |
| tree | fa0bee01ed74073c9e724beee8aae30b50ee2bd0 /llvm/lib/CodeGen | |
| parent | 84ae925f7a31413be9dda5be0d549254e33fe627 (diff) | |
| download | bcm5719-llvm-394c333e3e672a3c5844ba32a449fdd25e43f1d4.tar.gz bcm5719-llvm-394c333e3e672a3c5844ba32a449fdd25e43f1d4.zip | |
Group unsafe fmul math folds together for easier reading. No functional change.
llvm-svn: 217399
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 2efad3e6853..b21181c3985 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -6811,18 +6811,21 @@ SDValue DAGCombiner::visitFMUL(SDNode *N) { // fold (fmul c1, c2) -> c1*c2 if (N0CFP && N1CFP) return DAG.getNode(ISD::FMUL, SDLoc(N), VT, N0, N1); + // canonicalize constant to RHS if (N0CFP && !N1CFP) return DAG.getNode(ISD::FMUL, SDLoc(N), VT, N1, N0); - // fold (fmul A, 0) -> 0 - if (Options.UnsafeFPMath && N1CFP && N1CFP->getValueAPF().isZero()) - return N1; + // fold (fmul A, 1.0) -> A if (N1CFP && N1CFP->isExactlyValue(1.0)) return N0; - if (DAG.getTarget().Options.UnsafeFPMath) { - // If allowed, fold (fmul (fmul x, c1), c2) -> (fmul x, (fmul c1, c2)) + if (Options.UnsafeFPMath) { + // fold (fmul A, 0) -> 0 + if (N1CFP && N1CFP->getValueAPF().isZero()) + return N1; + + // fold (fmul (fmul x, c1), c2) -> (fmul x, (fmul c1, c2)) if (N1CFP && N0.getOpcode() == ISD::FMUL && N0.getNode()->hasOneUse() && isConstOrConstSplatFP(N0.getOperand(1))) { SDLoc SL(N); @@ -6830,7 +6833,7 @@ SDValue DAGCombiner::visitFMUL(SDNode *N) { return DAG.getNode(ISD::FMUL, SL, VT, N0.getOperand(0), MulConsts); } - // If allowed, fold (fmul (fadd x, x), c) -> (fmul x, (fmul 2.0, c)) + // fold (fmul (fadd x, x), c) -> (fmul x, (fmul 2.0, c)) // Undo the fmul 2.0, x -> fadd x, x transformation, since if it occurs // during an early run of DAGCombiner can prevent folding with fmuls // inserted during lowering. @@ -6845,6 +6848,7 @@ SDValue DAGCombiner::visitFMUL(SDNode *N) { // fold (fmul X, 2.0) -> (fadd X, X) if (N1CFP && N1CFP->isExactlyValue(+2.0)) return DAG.getNode(ISD::FADD, SDLoc(N), VT, N0, N0); + // fold (fmul X, -1.0) -> (fneg X) if (N1CFP && N1CFP->isExactlyValue(-1.0)) if (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT)) |
