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* ExpandPostRAPseudos: Fix alldefsAreDead() not removing operandsMatthias Braun2018-10-091-0/+2
| | | | | | | | One case left around nonsensical operands for the KILL instruction which the machine verifier checks for nowadays. While this should not hurt in release builds we should fix the machine verifier errors anyway. llvm-svn: 344008
* TwoAddressInstructionPass: Modernize/fix some comments; NFCMatthias Braun2018-10-081-5/+5
| | | | llvm-svn: 344006
* PHIElimination: Remove wrong comment; NFCMatthias Braun2018-10-081-2/+1
| | | | | | | | The comment was contradicting the code. Looking at history the feature was implemented a day after the comment was written without dropping the comment. llvm-svn: 344005
* MachineFunctionPrinterPass: Declare SlotIndexes as used if available; NFCMatthias Braun2018-10-081-0/+1
| | | | | | | This makes print-machineinstrs print the slot indexes in more situations. NFC for normal compilation. llvm-svn: 344004
* [DAGCombiner] simplify code for fmul with constant fold; NFCISanjay Patel2018-10-081-18/+8
| | | | llvm-svn: 343997
* [SelectionDAGBuilder][NFC] Pass LHSTy to getShiftAmountTy rather than RHSTyAlex Bradbury2018-10-081-1/+1
| | | | | | | | | | r126518 introduced a a type parameter to the getShiftAmountTy target hook. It produces the type of the shift (RHSTy), parameterised by the type of the value being shifted (LHSTy). SelectionDAGBuilder::visitShift passed RHSTy rather than LHSTy and this patch corrects this. The change is a no-op because in LLVM IR the LHS and RHS types for a shift must be equal anyway. llvm-svn: 343955
* Revert r343948 "[LegalizeDAG] Make one of the ReplaceNode signatures take an ↵Craig Topper2018-10-081-8/+6
| | | | | | | | ArrayRef instead a pointer to an array. Add assert on size of array. NFC" The assert is failing some asan tests on the bots. llvm-svn: 343950
* [LegalizeDAG] Make one of the ReplaceNode signatures take an ArrayRef ↵Craig Topper2018-10-081-6/+8
| | | | | | instead a pointer to an array. Add assert on size of array. NFC llvm-svn: 343948
* [LegalizeDAG] Move legalization of scatter and masked store from ↵Craig Topper2018-10-082-11/+10
| | | | | | | | | | LegalizeVectorOps to LegalizeDAG. This is where we legalize gather and masked load so this is consistent. Since these ops are always on vectors I've chosen to go with LegalizeDAG since that's what we do for other vector only ops like BUILD_VECTOR, VECTOR_SHUFFLE, etc. The ScalarizeMaskedMemIntrinsic pass should take care of scalarizing these before SelectionDAG so hopefully we don't need to worry about illegally typed scalar ops being emitted in the legalizing. If we did we would need to do this in LegalizeVectorOps so we could get the second type legalization that runs between LegalizeVectorOps and LegalizeDAG. llvm-svn: 343947
* [DAGCombiner] allow undef elts in vector fadd matchingSanjay Patel2018-10-071-1/+1
| | | | llvm-svn: 343945
* [DAGCombiner] allow undefs when matching vector splats for fmul foldsSanjay Patel2018-10-071-2/+2
| | | | llvm-svn: 343942
* [DAGCombiner] allow undef elts in vector fabs/fneg matchingSanjay Patel2018-10-071-1/+1
| | | | | | | | This change is proposed as a part of D44548, but we need this independently to avoid regressions from improved undef propagation in SimplifyDemandedVectorElts(). llvm-svn: 343940
* [DAGCombiner] shorten code for bitcast+fabs fold; NFCSanjay Patel2018-10-071-5/+2
| | | | llvm-svn: 343939
* [SelectionDAG] Respect multiple uses in SimplifyDemandedBits to ↵Simon Pilgrim2018-10-071-1/+1
| | | | | | | | | | | | SimplifyDemandedVectorElts simplification rL343913 was using SimplifyDemandedBits's original demanded mask instead of the adjusted 'NewMask' that accounts for multiple uses of the op (those variable names really need improving....). Annoyingly many of the test changes (back to pre-rL343913 state) are actually safe - but only because their multiple uses are all by PMULDQ/PMULUDQ. Thanks to Jan Vesely (@jvesely) for bisecting the bug. llvm-svn: 343935
* [LegalizeVectorOps] Make ExpandStrictFPOp return the result corresponding to ↵Craig Topper2018-10-071-1/+1
| | | | | | | | the result number of the SDValue passed in. It was always returning the chain which seems to be the result number of the SDValue in the lit tests we have. But I don't know if that's guaranteed. llvm-svn: 343933
* [SelectionDAG] Add SimplifyDemandedBits to SimplifyDemandedVectorElts ↵Simon Pilgrim2018-10-061-10/+46
| | | | | | | | | | | | | | | | simplification This patch enables SimplifyDemandedBits to call SimplifyDemandedVectorElts in cases where the demanded bits mask covers entire elements of a bitcasted source vector. There are a couple of cases here where simplification at a deeper level (such as through bitcasts) prevents further simplification - CommitTargetLoweringOpt only adds immediate uses/users back to the worklist when we might want to combine the original caller again to see what else it can simplify. As well as that I had to disable handling of bool vector until SimplifyDemandedVectorElts better supports some of their opcodes (SETCC, shifts etc.). Fixes PR39178 Differential Revision: https://reviews.llvm.org/D52935 llvm-svn: 343913
* [LiveDebugValues] Extend var ranges through artificial blocksVedant Kumar2018-10-051-12/+32
| | | | | | | | | | | | | | | | | | | | | | | | | ASan often introduces basic blocks consisting exclusively of instructions without debug locations, or with line 0 debug locations. LiveDebugValues needs to extend variable ranges through these artificial blocks. Otherwise, a lot of variables disappear -- even at -O0. Typically, LiveDebugValues does not extend a variable's range into a block unless the block is essentially "part of" the variable's scope (for a precise definition, see LexicalScopes::dominates). This patch relaxes the lexical dominance check for artificial blocks. This makes the following Swift program debuggable at -O0: ``` 1| var x = 100 2| print("x = \(x)") ``` rdar://39127144 Differential Revision: https://reviews.llvm.org/D52921 llvm-svn: 343890
* Clarify debug output in LiveDebugValuesVedant Kumar2018-10-051-7/+27
| | | | | | | MachineBasicBlocks often do not have names, so it helps to refer to them by block number when printing debug messages. llvm-svn: 343889
* [GlobalIsel] Add llvm.invariant.start and llvm.invariant.endJessica Paquette2018-10-051-0/+8
| | | | | | | | | | | | Port over the implementation in SelectionDAGBuilder.cpp into the IRTranslator and update the arm64-irtranslator test. These were causing fallbacks in CTMark/Bullet (-Rpass-missed=gisel-select), and this patch fixes that. https://reviews.llvm.org/D52945 llvm-svn: 343885
* [DebugInfo] Add support for DWARF5 call site-related attributesVedant Kumar2018-10-054-3/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DWARF v5 introduces DW_AT_call_all_calls, a subprogram attribute which indicates that all calls (both regular and tail) within the subprogram have call site entries. The information within these call site entries can be used by a debugger to populate backtraces with synthetic tail call frames. Tail calling frames go missing in backtraces because the frame of the caller is reused by the callee. Call site entries allow a debugger to reconstruct a sequence of (tail) calls which led from one function to another. This improves backtrace quality. There are limitations: tail recursion isn't handled, variables within synthetic frames may not survive to be inspected, etc. This approach is not novel, see: https://gcc.gnu.org/wiki/summit2010?action=AttachFile&do=get&target=jelinek.pdf This patch adds an IR-level flag (DIFlagAllCallsDescribed) which lowers to DW_AT_call_all_calls. It adds the minimal amount of DWARF generation support needed to emit standards-compliant call site entries. For easier deployment, when the debugger tuning is LLDB, the DWARF requirement is adjusted to v4. Testing: Apart from check-{llvm, clang}, I built a stage2 RelWithDebInfo clang binary. Its dSYM passed verification and grew by 1.4% compared to the baseline. 151,879 call site entries were added. rdar://42001377 Differential Revision: https://reviews.llvm.org/D49887 llvm-svn: 343883
* DwarfDebug: Pick next location in case of missing location at block beginMatthias Braun2018-10-052-41/+74
| | | | | | | | | | | | | | | | | Context: Compiler generated instructions do not have a debug location assigned to them. However emitting 0-line records for all of them bloats the line tables for very little benefit so we usually avoid doing that. Not emitting anything will lead to the previous debug location getting applied to the locationless instructions. This is not desirable for block begin and after labels. Previously we would emit simply emit line-0 records in this case, this patch changes the behavior to do a forward search for a debug location in these cases before emitting a line-0 record to further reduce line table bloat. Inspired by the discussion in https://reviews.llvm.org/D52862 llvm-svn: 343874
* [SelectionDAG] allow undefs when matching splat constantsSanjay Patel2018-10-052-11/+9
| | | | | | | | | And use that to transform fsub with zero constant operands. The integer part isn't used yet, but it is proposed for use in D44548, so adding both enhancements here makes that patch simpler. llvm-svn: 343865
* [TargetRegisterInfo] Remove temporary hook enableMultipleCopyHints()Jonas Paulsson2018-10-051-30/+5
| | | | | | | | | | | | Finally all targets are enabling multiple regalloc hints, so the hook to disable this can now be removed. NFC. Review: Simon Pilgrim https://reviews.llvm.org/D52316 llvm-svn: 343851
* [globalisel][combine] When placing truncates, handle the case when the BB is ↵Daniel Sanders2018-10-041-14/+28
| | | | | | | | | empty GlobalISel uses MIR with implicit fallthrough on each basic block. As a result, getFirstNonPhi() can return end(). llvm-svn: 343829
* [globalisel][combine] Fix a rare crash when encountering an instruction ↵Daniel Sanders2018-10-041-7/+5
| | | | | | | | | | | | whose op0 isn't a reg The simplest instance of this is an intrinsic with no results which will have the intrinsic ID as operand 0. Also fix some benign incorrectness when op0 is a reg but isn't a def that was guarded against by checking for the extension opcodes. llvm-svn: 343821
* [X86][LegalizeVectorOps] Use MERGE_VALUES to return two results from ↵Craig Topper2018-10-041-11/+3
| | | | | | | | | | LowerLoad. Remove special case code in LegalizeVectorOps that allowed us to only return one result. Previously we replaced the chain use ourself and return the data result. LegalizeVectorOps then detected that we'd done this and assumed the chain had already been handled. This commit instead returns a MERGE_VALUES node with two results joined from nodes. This allows LegalizeVectorOps to do all the replacements for us without any special casing. The MERGE_VALUES will be removed by DAG combine. llvm-svn: 343817
* [globalisel][combine] Improve the truncate placement for the extending-loads ↵Daniel Sanders2018-10-041-28/+64
| | | | | | | | | | | | | | | | | | combine This brings the extending loads patch back to the original intent but minus the PHI bug and with another small improvement to de-dupe truncates that are inserted into the same block. The truncates are sunk to their uses unless this would require inserting before a phi in which case it sinks to the _beginning_ of the predecessor block for that path (but no earlier than the def). The reason for choosing the beginning of the predecessor is that it makes de-duping multiple truncates in the same block simple, and optimized code is going to run a scheduler at some point which will likely change the position anyway. llvm-svn: 343804
* [LegalizeIntegerTypes] Fix typo in comment. NFCCraig Topper2018-10-041-1/+1
| | | | llvm-svn: 343750
* [machineverifier] Detect PHI's that are preceeded by non-PHI'sDaniel Sanders2018-10-031-3/+11
| | | | | | | | If present, PHI nodes must appear before non-PHI nodes in a basic block. The register allocator relies on this and will fail to eliminate PHI's that do not meet this requirement. llvm-svn: 343731
* Make meanings of variables clearer in action table generation (NFC)Heejin Ahn2018-10-031-11/+12
| | | | | | | | | | | | Summary: Reviewers: kristina, zhmu, dschuff, rnk Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D52680 llvm-svn: 343724
* Emit template type and value parameter DIEs for template variables.Matthew Voss2018-10-031-0/+3
| | | | | | | | | | | | | | | | | | | Summary: Ensure the TemplateParam attribute of the DIGlobalVariable node is translated into the proper DIEs. Resolves https://bugs.llvm.org/show_bug.cgi?id=22119 Reviewers: dblaikie, probinson, aprantl, JDevlieghere, clayborg, whitequark, deadalnix Reviewed By: dblaikie Subscribers: llvm-commits Tags: #debug-info Differential Revision: https://reviews.llvm.org/D52057 llvm-svn: 343706
* Correct implementation of -verify-machineinstrs such that it's still ↵Daniel Sanders2018-10-031-5/+5
| | | | | | | | | | | overridable for EXPENSIVE_CHECKS -verify-machineinstrs was implemented as a simple bool. As a result, the 'VerifyMachineCode == cl::BOU_UNSET' used by EXPENSIVE_CHECKS to make it on by default but possible to disable didn't work as intended. Changed -verify-machineinstrs to a boolOrDefault to correct this. llvm-svn: 343696
* [globalisel][combines] Don't sink G_TRUNC down to use if that use is a G_PHIDaniel Sanders2018-10-031-2/+8
| | | | | | | | | | | | This fixes a problem where the register allocator fails to eliminate a PHI because there's a non-PHI in the middle of the PHI instructions at the start of a BB. This G_TRUNC can be better placed but this at least fixes the correctness issue quickly. I'll follow up with a patch to the verifier to catch this kind of bug in future. llvm-svn: 343693
* [RA CopyHints] Fix compile-time regressionJonas Paulsson2018-10-031-2/+4
| | | | | | | | | | | This patch makes sure that a register is only hinted once to RA. In extreme cases the same register can otherwise be hinted numerous times and cause a compile time slowdown. Review: Simon Pilgrim https://reviews.llvm.org/D52826 llvm-svn: 343686
* [CodeGen] NFC fix pedantic warning from extra semicolonJonas Toth2018-10-031-1/+1
| | | | llvm-svn: 343674
* Re-commit: [globalisel] Add a combiner helpers for extending loads and use ↵Daniel Sanders2018-10-033-4/+261
| | | | | | | | | | | | | | | | | | | | them in a pre-legalize combiner for AArch64 Summary: Depends on D45541 Reviewers: ab, aditya_nandakumar, bogner, rtereshin, volkan, rovka, javed.absar, aemerson Subscribers: aemerson, rengolin, mgorny, javed.absar, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D45543 The previous commit failed portions of the test-suite on GreenDragon due to duplicate COPY instructions and iterator invalidation. Both issues have now been fixed. To assist with this, a helper (cloneVirtualRegister) has been added to MachineRegisterInfo that can be used to get another register that has the same type and class/bank as an existing one. llvm-svn: 343654
* [CodeView] Only add the Scoped flag for an enum type when it has an ↵Aaron Smith2018-10-021-5/+13
| | | | | | | | | | | | immediate function scope to match MSVC Reviewers: rnk, zturner, llvm-commits Reviewed By: rnk Differential Revision: https://reviews.llvm.org/D52706 llvm-svn: 343627
* [CodeView] Emit function options for subprogram and member functionsAaron Smith2018-10-022-12/+44
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: Use the newly added DebugInfo (DI) Trivial flag, which indicates if a C++ record is trivial or not, to determine Codeview::FunctionOptions. Clang and MSVC generate slightly different Codeview for C++ records. For example, here is the C++ code for a class with a defaulted ctor, class C { public: C() = default; }; Clang will produce a LF for the defaulted ctor while MSVC does not. For more details, refer to FIXMEs in the test cases in "function-options.ll" included with this set of changes. Reviewers: zturner, rnk, llvm-commits, aleksandr.urakov Reviewed By: rnk Subscribers: Hui, JDevlieghere Differential Revision: https://reviews.llvm.org/D45123 llvm-svn: 343626
* [globalisel][verifier] Run the MachineVerifier from IRTranslator onwardsDaniel Sanders2018-10-022-0/+9
| | | | | | | | | | | | | | -verify-machineinstrs inserts the MachineVerifier after every MachineInstr-based pass. However, GlobalISel creates MachineInstr-based passes earlier than DAGISel and the corresponding verifiers are not being added. This patch fixes that. If GlobalISel triggers the fallback path then the MIR can be left in a bad state that is going to be cleared by ResetMachineFunctions. In this situation verifying between GlobalISel passes will prevent the fallback path from recovering from this. As a result, we bail out of verifying a function if the FailedISel attribute is present. llvm-svn: 343613
* [codeview] Fix 32-bit x86 variable locations in realigned stack framesReid Kleckner2018-10-022-4/+12
| | | | | | | | | | | | | | | | | | Add the .cv_fpo_stackalign directive so that we can define $T0, or the VFRAME virtual register, with it. This was overlooked in the initial implementation because unlike MSVC, we push CSRs before allocating stack space, so this value is only needed to describe local variable locations. Variables that the compiler now addresses via ESP are instead described as being stored at offsets from VFRAME, which for us is ESP after alignment in the prologue. This adds tests that show that we use the VFRAME register properly in our S_DEFRANGE records, and that we emit the correct FPO data to define it. Fixes PR38857 llvm-svn: 343603
* Revert: r343521 and r343541: [globalisel] Add a combiner helpers for ↵Daniel Sanders2018-10-012-244/+4
| | | | | | | | | | extending loads and use them in a pre-legalize combiner for AArch64 There's a strange assertion on two of the Green Dragon bots that goes away when this is reverted. The assertion is in RegBankAlloc and if it is this commit then -verify-machine-instrs should have caught it earlier in the pipeline. llvm-svn: 343546
* [codeview] Simplify S_DEFRANGE emission code, NFCReid Kleckner2018-10-011-30/+22
| | | | | | | These assembler directives are still pretty unreadable and it would be nice to clean them up at some point. llvm-svn: 343544
* [codeview] Emit S_FRAMEPROC and use S_DEFRANGE_FRAMEPOINTER_RELReid Kleckner2018-10-014-42/+187
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Before this change, LLVM would always describe locals on the stack as being relative to some specific register, RSP, ESP, EBP, ESI, etc. Variables in stack memory are pretty common, so there is a special S_DEFRANGE_FRAMEPOINTER_REL symbol for them. This change uses it to reduce the size of our debug info. On top of the size savings, there are cases on 32-bit x86 where local variables are addressed from ESP, but ESP changes across the function. Unlike in DWARF, there is no FPO data to describe the stack adjustments made to push arguments onto the stack and pop them off after the call, which makes it hard for the debugger to find the local variables in frames further up the stack. To handle this, CodeView has a special VFRAME register, which corresponds to the $T0 variable set by our FPO data in 32-bit. Offsets to local variables are instead relative to this value. This is part of PR38857. Reviewers: hans, zturner, javed.absar Subscribers: aprantl, hiraditya, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D52217 llvm-svn: 343543
* Fix the Windows build in GlobalISelReid Kleckner2018-10-011-7/+6
| | | | | | | | | | | | | | Clang-cl was complaining about some sort of constexpr narrowing bug: C:\src\llvm-project\llvm\lib\CodeGen\GlobalISel\CombinerHelper.cpp(136,31): error: non-constant-expression cannot be narrowed from type 'llvm::TargetOpcode::(anonymous enum at C:\src\llvm-project\llvm\include\llvm/CodeGen/TargetOpcodes.h:22:1)' to 'unsigned int' in initializer list [-Wc++11-narrowing] unsigned(MI.getOpcode()) == unsigned(TargetOpcode::G_LOAD) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ C:\src\llvm-project\llvm\lib\CodeGen\GlobalISel\CombinerHelper.cpp(136,31): note: insert an explicit cast to silence this issue unsigned(MI.getOpcode()) == unsigned(TargetOpcode::G_LOAD) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ static_cast<unsigned int>( llvm-svn: 343541
* [globalisel] Add a combiner helpers for extending loads and use them in a ↵Daniel Sanders2018-10-012-4/+245
| | | | | | | | | | | | | | pre-legalize combiner for AArch64 Summary: Depends on D45541 Reviewers: ab, aditya_nandakumar, bogner, rtereshin, volkan, rovka, javed.absar, aemerson Subscribers: aemerson, rengolin, mgorny, javed.absar, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D45543 llvm-svn: 343521
* MIRParser: Check that instructions only reference DILocation metadataMatthias Braun2018-10-011-0/+2
| | | | llvm-svn: 343505
* DAGCombiner: StoreMerging: Fix bad index calculating when adjusting ↵Matthias Braun2018-10-011-17/+8
| | | | | | | | | | | | | | | | mismatching vector types This fixes a case of bad index calculation when merging mismatching vector types. This changes the existing code to just use the existing extract_{subvector|element} and a bitcast (instead of bitcast first and then newly created extract_xxx) so we don't need to adjust any indices in the first place. rdar://44584718 Differential Revision: https://reviews.llvm.org/D52681 llvm-svn: 343493
* [DebugInfo][Dexter] Incorrect DBG_VALUE after MCP dead copy instruction removal.Carlos Alberto Enciso2018-10-013-6/+17
| | | | | | | | When MachineCopyPropagation eliminates a dead 'copy', its associated debug information becomes invalid. as the recorded register has been removed. It causes the debugger to display wrong variable value. Differential Revision: https://reviews.llvm.org/D52614 llvm-svn: 343445
* Use the container form llvm::sort(C, ...)Fangrui Song2018-09-302-6/+5
| | | | | | | There are a few leftovers in rL343163 which span two lines. This commit changes these llvm::sort(C.begin(), C.end, ...) to llvm::sort(C, ...) llvm-svn: 343426
* [PHIElimination] Lower a PHI node with only undef uses as IMPLICIT_DEFBjorn Pettersson2018-09-301-13/+13
| | | | | | | | | | | | | | | | | | | | | Summary: The lowering of PHI nodes used to detect if all inputs originated from IMPLICIT_DEF's. If so the PHI node was replaced by an IMPLICIT_DEF. Now we also consider undef uses when checking the inputs. So if all inputs are implicitly defined or undef we lower the PHI to an IMPLICIT_DEF. This makes PHIElimination::LowerPHINode more consistent as it checks both implicit and undef properties at later stages. Reviewers: MatzeB, tstellar Reviewed By: MatzeB Subscribers: jvesely, nhaehnle, llvm-commits Differential Revision: https://reviews.llvm.org/D52558 llvm-svn: 343417
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