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* reduce indentation by using early exits. No functionality change.Chris Lattner2006-11-111-154/+161
| | | | llvm-svn: 31660
* move big chunks of code out-of-line, no functionality change.Chris Lattner2006-11-111-235/+241
| | | | llvm-svn: 31658
* Fix a dag combiner bug exposed by my recent instcombine patch. This fixesChris Lattner2006-11-101-1/+1
| | | | | | CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll and PPC gsm/toast llvm-svn: 31644
* Add implicit def / use operands to MachineInstr.Evan Cheng2006-11-105-29/+23
| | | | llvm-svn: 31633
* When forming a pre-indexed store, make sure ptr isn't the same or is a pred ↵Evan Cheng2006-11-101-7/+16
| | | | | | of value being stored. It would cause a cycle. llvm-svn: 31631
* commentateChris Lattner2006-11-101-0/+2
| | | | llvm-svn: 31627
* Don't attempt expensive pre-/post- indexed dag combine if target does not ↵Evan Cheng2006-11-091-1/+18
| | | | | | support them. llvm-svn: 31598
* Add a mechanism to specify whether a target supports a particular indexed ↵Evan Cheng2006-11-091-0/+8
| | | | | | load / store. llvm-svn: 31597
* Rename ISD::MemOpAddrMode to ISD::MemIndexedModeEvan Cheng2006-11-091-2/+2
| | | | llvm-svn: 31596
* Rename ISD::MemOpAddrMode to ISD::MemIndexedModeEvan Cheng2006-11-092-9/+11
| | | | llvm-svn: 31595
* Allows debugging llc self hosted.Jim Laskey2006-11-091-2/+7
| | | | llvm-svn: 31594
* Merging dwarf info to a single compile unit.Jim Laskey2006-11-091-117/+104
| | | | llvm-svn: 31593
* getPostIndexedAddressParts change: passes in load/store instead of its ↵Evan Cheng2006-11-091-3/+1
| | | | | | loaded / stored VT. llvm-svn: 31584
* Remove M_2_ADDR_FLAG.Evan Cheng2006-11-091-2/+0
| | | | llvm-svn: 31583
* Match more post-indexed ops.Evan Cheng2006-11-081-2/+6
| | | | llvm-svn: 31569
* Remove redundant <cmath>.Jim Laskey2006-11-084-4/+0
| | | | llvm-svn: 31561
* Now can re-enable debug label folding.Jim Laskey2006-11-081-3/+0
| | | | llvm-svn: 31549
* - When performing pre-/post- indexed load/store transformation, do not worryEvan Cheng2006-11-081-90/+29
| | | | | | | | about whether the new base ptr would be live below the load/store. Let two address pass split it back to non-indexed ops. - Minor tweaks / fixes. llvm-svn: 31544
* Fixed a minor bug preventing some pre-indexed load / store transformation.Evan Cheng2006-11-081-3/+3
| | | | llvm-svn: 31543
* For PR950:Reid Spencer2006-11-082-42/+16
| | | | | | | | This patch converts the old SHR instruction into two instructions, AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not dependent on the sign of their operands. llvm-svn: 31542
* Fix a obscure post-indexed load / store dag combine bug.Evan Cheng2006-11-081-1/+1
| | | | llvm-svn: 31537
* optimize single MBB loops better. In particular, produce:Chris Lattner2006-11-081-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LBB1_57: #bb207.i movl 72(%esp), %ecx movb (%ecx,%eax), %cl movl 80(%esp), %edx movb %cl, 1(%edx,%eax) incl %eax cmpl $143, %eax jne LBB1_57 #bb207.i jmp LBB1_64 #cond_next255.i intead of: LBB1_57: #bb207.i movl 72(%esp), %ecx movb (%ecx,%eax), %cl movl 80(%esp), %edx movb %cl, 1(%edx,%eax) incl %eax cmpl $143, %eax je LBB1_64 #cond_next255.i jmp LBB1_57 #bb207.i This eliminates a branch per iteration of the loop. This hurted PPC particularly, because the extra branch meant another dispatch group for each iteration of the loop. llvm-svn: 31530
* Accidently reran commit.Jim Laskey2006-11-071-0/+3
| | | | llvm-svn: 31516
* Missed a label map, reverting till covered.Jim Laskey2006-11-071-3/+0
| | | | llvm-svn: 31514
* Missed a label map, reverting till covered.Jim Laskey2006-11-071-0/+3
| | | | llvm-svn: 31512
* 1. Add a pass to fold debug label instructions so a debug info client can detectJim Laskey2006-11-073-48/+94
| | | | | | | | | | | | | empty ranges. 2. Reorg how MachineDebugInfo maintains changes to debug labels. 3. Have dwarf writer use debug label info to simplify scopes and source line coorespondence. 4. Revert the merging of compile units until I can get the bugs ironed out. llvm-svn: 31507
* Enable improved spilling costs by default. This speeds up viterbi on x86Chris Lattner2006-11-071-12/+7
| | | | | | | | by 40%, FreeBench/fourinarow by 20%, and many other programs 10-25%. On PPC, this speeds up fourinarow by 18%, and probably other things as well. llvm-svn: 31504
* Use correct value for float HUGH_VAL.Jim Laskey2006-11-072-6/+6
| | | | llvm-svn: 31500
* Add post-indexed load / store transformations.Evan Cheng2006-11-071-49/+198
| | | | llvm-svn: 31498
* Add a new llcbeta option. This speeds up viterbi from 12.34 to 8.76s onChris Lattner2006-11-071-4/+19
| | | | | | X86. If happy, I'll enable this by default. llvm-svn: 31493
* Unbreak X86/ELF Debugging. Somehow this line got lost in Jim's cleanup.Reid Spencer2006-11-071-0/+2
| | | | llvm-svn: 31492
* Fix PR988 and CodeGen/Generic/2006-11-06-MemIntrinsicExpand.ll.Chris Lattner2006-11-071-1/+1
| | | | | | The low part goes in the first operand of expandop, not the second one. llvm-svn: 31487
* Remove dead code; added a missing null ptr check.Evan Cheng2006-11-061-32/+1
| | | | llvm-svn: 31478
* Tab interferes with uniqueness.Jim Laskey2006-11-061-1/+1
| | | | | | | NOTE: There doesn't seem to be consistency for whether a leading tab is present in a section heading. llvm-svn: 31475
* D'oh - reversed logic.Jim Laskey2006-11-061-1/+1
| | | | llvm-svn: 31474
* Add comment.Evan Cheng2006-11-061-4/+10
| | | | llvm-svn: 31473
* Unbreak VC++ build.Jeff Cohen2006-11-053-9/+10
| | | | llvm-svn: 31464
* Added pre-indexed store support.Evan Cheng2006-11-051-10/+24
| | | | llvm-svn: 31459
* Added getIndexedStore.Evan Cheng2006-11-051-0/+30
| | | | llvm-svn: 31458
* Live local variables are being dropped because the begin or end labels markingJim Laskey2006-11-041-3/+4
| | | | | | their scope are being deleted. Workaround is to widen scope to full function. llvm-svn: 31454
* Changes to use operand constraints to process two-address instructions.Evan Cheng2006-11-043-50/+140
| | | | llvm-svn: 31453
* Fixed some spiller bugs exposed by the recent two-address code changes. NowEvan Cheng2006-11-041-21/+53
| | | | | | | | | there may be other def(s) apart from the use&def two-address operand. We need to check if the register reuse for a use&def operand may conflicts with another def. Provide a mean to recover from the conflict if it is detected when the defs are processed later. llvm-svn: 31439
* this will work betterChris Lattner2006-11-031-2/+2
| | | | llvm-svn: 31419
* Fix the build on xcode < 2.4Chris Lattner2006-11-031-0/+7
| | | | llvm-svn: 31417
* Fix comments.Evan Cheng2006-11-031-3/+8
| | | | llvm-svn: 31414
* RenameEvan Cheng2006-11-031-1/+1
| | | | llvm-svn: 31413
* Remove dead variable. Fix 80 column violations.Reid Spencer2006-11-031-3/+3
| | | | llvm-svn: 31412
* Added DAG combiner transformation to generate pre-indexed loads.Evan Cheng2006-11-031-0/+112
| | | | llvm-svn: 31410
* Added isPredecessor.Evan Cheng2006-11-031-0/+23
| | | | llvm-svn: 31409
* Proper check for two-addressness.Evan Cheng2006-11-031-7/+22
| | | | llvm-svn: 31408
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