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* RegScavenger::enterBasicBlock should always reset register state.Evan Cheng2009-11-121-5/+2
| | | | llvm-svn: 86972
* Move the utility function UpdateTerminator() from CodePlacementOpt() intoJim Grosbach2009-11-122-61/+56
| | | | | | MachineBasicBlock so other passes can utilize it. llvm-svn: 86947
* Make the BranchFolderPass class local to BranchFolding.cpp.Dan Gohman2009-11-122-14/+15
| | | | llvm-svn: 86928
* Minor code cleanups.Dan Gohman2009-11-121-9/+9
| | | | llvm-svn: 86926
* Fixed an iteration condition in PreAllocSplitting. This should fix some ↵Lang Hames2009-11-121-1/+1
| | | | | | miscompilations casued by PreAllocSplitting. llvm-svn: 86919
* Tail merge at any size when there are two potentials blocks and oneDan Gohman2009-11-121-10/+34
| | | | | | can be made to fall through into the other. llvm-svn: 86909
* Don't mark a call as potentially throwing if the function it's calling has theBill Wendling2009-11-111-1/+21
| | | | | | "nounwind" attribute. llvm-svn: 86897
* Promote MergePotentialsElt and SameTailElt to be regular classesDan Gohman2009-11-112-58/+107
| | | | | | | instead of typedefs for std::pair. This simplifies the type of SameTails, which previously was std::vector<std::pair<std::vector<std::pair<unsigned, MachineBasicBlock *> >::iterator, MachineBasicBlock::iterator> llvm-svn: 86885
* x86 users can now return arbitrary sized structs. Structs too large to fit ↵Kenneth Uildriks2009-11-112-67/+211
| | | | | | in return registers will be returned through a hidden sret parameter introduced during SelectionDAG construction. llvm-svn: 86876
* Revert this line of 86871.Dan Gohman2009-11-111-1/+1
| | | | llvm-svn: 86875
* If doesSupportDebugInformation() is false then do not try to emit dwarf ↵Devang Patel2009-11-111-0/+3
| | | | | | debug info. llvm-svn: 86874
* Check in the changes to this file too.Dan Gohman2009-11-111-3/+9
| | | | llvm-svn: 86873
* Add support for tail duplication to BranchFolding, and extendDan Gohman2009-11-112-53/+296
| | | | | | | | | | | tail merging support to handle more cases. - Recognize several cases where tail merging is beneficial even when the tail size is smaller than the generic threshold. - Make use of MachineInstrDesc::isBarrier to help detect non-fallthrough blocks. - Check for and avoid disrupting fall-through edges in more cases. llvm-svn: 86871
* Fix liveness calculation when splitting critical edges during PHI elimination.Jakob Stoklund Olesen2009-11-113-52/+78
| | | | | | | | | | | | | | - Edges are split before any phis are eliminated, so the code is SSA. - Create a proper IR BasicBlock for the split edges. - LiveVariables::addNewBlock now has same syntax as MachineDominatorTree::addNewBlock. Algorithm calculates predecessor live-out set rather than successor live-in set. This feature still causes some miscompilations. llvm-svn: 86867
* Fix indentation level.Dan Gohman2009-11-111-8/+8
| | | | llvm-svn: 86856
* Whitespace cleanups.Dan Gohman2009-11-111-93/+92
| | | | llvm-svn: 86855
* Prefix MBB numbers with "BB#" in debug output to make it clear whatDan Gohman2009-11-111-3/+3
| | | | | | the numbers mean. llvm-svn: 86854
* Minor code simplification.Dan Gohman2009-11-111-9/+8
| | | | llvm-svn: 86853
* Fix -Asserts warning.Daniel Dunbar2009-11-111-0/+1
| | | | llvm-svn: 86794
* Make sure that the exception handling data has the same visibility as theBill Wendling2009-11-111-2/+7
| | | | | | function it's generated for. llvm-svn: 86779
* Do not assume first function scope seen represents current function. Devang Patel2009-11-111-2/+3
| | | | llvm-svn: 86771
* While creating DbgScopes, do not forget parent scope. Devang Patel2009-11-111-0/+2
| | | | llvm-svn: 86763
* Ignore variable if scope info is not available.Devang Patel2009-11-101-2/+5
| | | | llvm-svn: 86753
* Emit correct code when making a ConstantPool entry for a vectorDale Johannesen2009-11-101-2/+11
| | | | | | | | | constant whose component type is not a legal type for the target. (If the target ConstantPool cannot handle this type either, it has an opportunity to merge elements. In practice any target with 8-bit bytes must support i8 *as data*). 7320806 (partial). llvm-svn: 86751
* Implement support to debug inlined functions.Devang Patel2009-11-107-548/+600
| | | | llvm-svn: 86748
* Teach PHIElimination to split critical edges when -split-phi-edges is enabled.Jakob Stoklund Olesen2009-11-103-4/+125
| | | | | | | | Critical edges leading to a PHI node are split when the PHI source variable is live out from the predecessor block. This help the coalescer eliminate more PHI joins. llvm-svn: 86725
* Refactoring: Extract method PHIElimination::isLiveOut().Jakob Stoklund Olesen2009-11-102-69/+65
| | | | | | | Clean up some whitespace. No functional changes. llvm-svn: 86724
* Codegen support for the llvm.invariant/lifetime.start/end intrinsics:Duncan Sands2009-11-102-0/+19
| | | | | | just throw them away. llvm-svn: 86678
* Remove an unused variable.Dan Gohman2009-11-101-1/+0
| | | | llvm-svn: 86642
* Minor code simplification.Dan Gohman2009-11-101-1/+1
| | | | llvm-svn: 86641
* Fix DenseMap iterator constness.Jeffrey Yasskin2009-11-103-4/+4
| | | | | | | | | | | | | | | | | | | This patch forbids implicit conversion of DenseMap::const_iterator to DenseMap::iterator which was possible because DenseMapIterator inherited (publicly) from DenseMapConstIterator. Conversion the other way around is now allowed as one may expect. The template DenseMapConstIterator is removed and the template parameter IsConst which specifies whether the iterator is constant is added to DenseMapIterator. Actually IsConst parameter is not necessary since the constness can be determined from KeyT but this is not relevant to the fix and can be addressed later. Patch by Victor Zverovich! llvm-svn: 86636
* Fixed to address code review. No functional changes.David Goodwin2009-11-101-1/+1
| | | | llvm-svn: 86634
* Allow targets to specify register classes whose member registers should not ↵David Goodwin2009-11-103-5/+20
| | | | | | be renamed to break anti-dependencies. llvm-svn: 86628
* Remove an unneeded #include.Dan Gohman2009-11-091-1/+0
| | | | llvm-svn: 86601
* Fix for 64-bit builds.Mike Stump2009-11-091-1/+1
| | | | llvm-svn: 86600
* Print "..." instead of all the uninteresting register clobbers on callDan Gohman2009-11-091-14/+54
| | | | | | | | | | | | instructions. This makes CodeGen dumps significantly less noisy. Example before: BL <ga:@bar>, %R0<imp-def>, %R1<imp-def,dead>, %R2<imp-def,dead>, %R3<imp-def,dead>, %R12<imp-def,dead>, %LR<imp-def,dead>, %D0<imp-def,dead>, %D1<imp-def,dead>, %D2<imp-def,dead>, %D3<imp-def,dead>, %D4<imp-def,dead>, %D5<imp-def,dead>, %D6<imp-def,dead>, %D7<imp-def,dead>, %D16<imp-def,dead>, %D17<imp-def,dead>, %D18<imp-def,dead>, %D19<imp-def,dead>, %D20<imp-def,dead>, %D21<imp-def,dead>, %D22<imp-def,dead>, %D23<imp-def,dead>, %D24<imp-def,dead>, %D25<imp-def,dead>, %D26<imp-def,dead>, %D27<imp-def,dead>, %D28<imp-def,dead>, %D29<imp-def,dead>, %D30<imp-def,dead>, %D31<imp-def,dead>, %CPSR<imp-def,dead>, %FPSCR<imp-def,dead> Same example after: BL <ga:@bar>, %R0<imp-def>, %R1<imp-def,dead>, %LR<imp-def,dead>, %CPSR<imp-def,dead>, ... llvm-svn: 86583
* Fix dependencies added to model memory aliasing for post-RA scheduling. The ↵David Goodwin2009-11-091-96/+97
| | | | | | dependencies were overly conservative for memory access that are known not to alias. llvm-svn: 86580
* Constify MachineFunctionAnalysis' TargetMachine reference.Dan Gohman2009-11-091-1/+1
| | | | llvm-svn: 86564
* Hide a couple of options.Evan Cheng2009-11-092-2/+3
| | | | llvm-svn: 86522
* 80 col.Evan Cheng2009-11-091-2/+4
| | | | llvm-svn: 86521
* Moved some ManagedStatics out of the SlotIndexes header.Lang Hames2009-11-081-2/+28
| | | | llvm-svn: 86446
* Add 8 bit libcalls and make use of them for msp430Anton Korobeynikov2009-11-072-10/+30
| | | | llvm-svn: 86384
* Fix PR5421 by APInt'izing switch lowering.Chris Lattner2009-11-072-17/+19
| | | | llvm-svn: 86354
* Update some globals to use ManagedStatic.Lang Hames2009-11-071-2/+4
| | | | llvm-svn: 86342
* Fix memoizing of CvtRndSatSDNodeMon P Wang2009-11-071-1/+2
| | | | llvm-svn: 86340
* - Add TargetInstrInfo::isIdentical(). It's similar to MachineInstr::isIdenticalEvan Cheng2009-11-072-35/+55
| | | | | | | | | | except it doesn't care if the definitions' virtual registers differ. This is used by machine LICM and other MI passes to perform CSE. - Teach Thumb2InstrInfo::isIdentical() to check two t2LDRpci_pic are identical. Since pc relative constantpool entries are always different, this requires it it check if the values can actually the same. llvm-svn: 86328
* Add code to check at SelectionDAGISel::LowerArguments time to see if return ↵Kenneth Uildriks2009-11-072-0/+75
| | | | | | values can be lowered to registers. Coming soon, code to perform sret-demotion if return values cannot be lowered to registers llvm-svn: 86324
* Fix inverted conflict test in -early-coalesce.Jakob Stoklund Olesen2009-11-071-14/+15
| | | | | | | | | | A non-identity copy cannot be coalesced when the phi join destination register is live at the copy site. Also verify the condition that the PHI join source register is only used in the PHI join. Otherwise the coalescing is invalid. llvm-svn: 86322
* Fix comment typos.Bob Wilson2009-11-061-3/+3
| | | | llvm-svn: 86295
* Use WriteAsOperand to print GlobalAddress MachineOperands. ThisDan Gohman2009-11-061-1/+2
| | | | | | prints them with the leading '@'. llvm-svn: 86261
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