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* Even though no caller actually uses the new valueDuncan Sands2008-09-011-1/+2
| | | | | | | (what matters is that it is added to the worklist), it seems more logical to return it. llvm-svn: 55606
* Cosmetic changes to Machine LICM. No functionality change.Bill Wendling2008-08-311-31/+36
| | | | llvm-svn: 55578
* Another situation where ROTR is cheaper than ROTL.Bill Wendling2008-08-311-3/+3
| | | | llvm-svn: 55577
* For this pattern, ROTR is the cheaper option.Bill Wendling2008-08-311-4/+4
| | | | llvm-svn: 55576
* - Fix comment so that it describes how the code really works:Bill Wendling2008-08-311-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | // fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) -> // (rotl x, y) // fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) -> // (rotr x, (sub 32, y)) Example: (x == 0xDEADBEEF and y == 4) (x << 4) | (x >> 28) => 0xEADBEEF0 | 0x0000000D => 0xEADBEEFD (rotl x, 4) => 0xEADBEEFD (rotr x, 28) => 0xEADBEEFD - Fix comment and code for second version. It wasn't using the rot* propertly. // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) -> // (rotr x, y) // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) -> // (rotl x, (sub 32, y)) (x << 28) | (x >> 4) => 0xD0000000 | 0x0DEADBEE => 0xDDEADBEE (rotl x, 4) => 0xEADBEEFD (rotr x, 28) => (0xEADBEEFD) llvm-svn: 55575
* typoGabor Greif2008-08-301-1/+1
| | | | llvm-svn: 55574
* fix some 80-col violationsGabor Greif2008-08-301-19/+23
| | | | llvm-svn: 55571
* Re-apply 55467 with fix. If copy is being replaced by remat'ed def, transfer ↵Evan Cheng2008-08-302-4/+83
| | | | | | the implicit defs onto the remat'ed instruction. llvm-svn: 55564
* Fold isRematerializable checks into isSafeToReMat.Evan Cheng2008-08-301-1/+3
| | | | llvm-svn: 55563
* Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 ↵Evan Cheng2008-08-301-0/+60
| | | | | | shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case). llvm-svn: 55558
* Fix an issue where a use might be selected before a def, and then we didn't ↵Owen Anderson2008-08-301-8/+23
| | | | | | | | | | | respect the pre-chosen vreg assignment when selecting the def. This is the naive solution to the problem: insert a copy to the pre-chosen vreg. Other solutions might be preferable, such as: 1) Passing the dest reg into FastEmit_. However, this would require the higher level code to know about reg classes, which they don't currently. 2) Selecting blocks in reverse postorder. This has some compile time cost for computing the order, and we'd need to measure its impact. llvm-svn: 55555
* Fix 80 col. violations.Evan Cheng2008-08-291-2/+4
| | | | llvm-svn: 55551
* Back out 55498. It broken Apple style bootstrapping.Evan Cheng2008-08-291-106/+81
| | | | llvm-svn: 55549
* Add a target callback for FastISel.Dan Gohman2008-08-281-2/+7
| | | | llvm-svn: 55512
* erect abstraction boundaries for accessing SDValue members, rename Val -> ↵Gabor Greif2008-08-2814-696/+704
| | | | | | Node to reflect semantics llvm-svn: 55504
* Implement null and undef values for FastISel.Dan Gohman2008-08-281-0/+5
| | | | llvm-svn: 55500
* Optimize DAGCombiner's worklist processing. Previously it startedDan Gohman2008-08-281-77/+102
| | | | | | | | | | | | | its work by putting all nodes in the worklist, requiring a big dynamic allocation. Now, DAGCombiner just iterates over the AllNodes list and maintains a worklist for nodes that are newly created or need to be revisited. This allows the worklist to stay small in most cases, so it can be a SmallVector. This has the side effect of making DAGCombine not miss a folding opportunity in alloca-align-rounding.ll. llvm-svn: 55498
* Move CaseBlock, JumpTable, and BitTestBlock to be members ofDan Gohman2008-08-281-80/+77
| | | | | | | | SelectionDAGLowering instead of being in an anonymous namespace. This fixes warnings about SelectionDAGLowering having fields using anonymous namespaces. llvm-svn: 55497
* Fix a FastISel bug where the instructions from lowering the argumentsDan Gohman2008-08-281-12/+16
| | | | | | were being emitted after the first instructions of the entry block. llvm-svn: 55496
* Reduce the size of the Parts vector.Rafael Espindola2008-08-281-3/+4
| | | | llvm-svn: 55483
* Hook up support for fast-isel of trunc instructions, using the newly working ↵Owen Anderson2008-08-281-1/+4
| | | | | | support for EXTRACT_SUBREG. llvm-svn: 55482
* FastEmitInst_extractsubreg doesn't need to be passed the register class. It ↵Owen Anderson2008-08-281-2/+2
| | | | | | can get it from MachineRegisterInfo instead. llvm-svn: 55476
* Revert r55467; it causes regressions in UnitTests/Vector/divides,Dan Gohman2008-08-282-68/+4
| | | | | | Benchmarks/sim/sim, and others on x86-64. llvm-svn: 55475
* Correctly resize the Parts array.Rafael Espindola2008-08-281-1/+1
| | | | llvm-svn: 55471
* If a copy isn't coalesced, but its src is defined by trivial computation. ↵Evan Cheng2008-08-282-4/+68
| | | | | | Re-materialize the src to replace the copy. llvm-svn: 55467
* Split the ATOMIC NodeType's to include the size, e.g.Dale Johannesen2008-08-283-75/+424
| | | | | | | | | | | | | | | | ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD. Increased the Hardcoded Constant OpActionsCapacity to match. Large but boring; no functional change. This is to support partial-word atomics on ppc; i8 is not a valid type there, so by the time we get to lowering, the ATOMIC_LOAD nodes looks the same whether the type was i8 or i32. The information can be added to the AtomicSDNode, but that is the largest SDNode; I don't fully understand the SDNode allocation, but it is sensitive to the largest node size, so increasing that must be bad. This is the alternative. llvm-svn: 55457
* Reorganize the lifetimes of the major objects SelectionDAGISelDan Gohman2008-08-272-232/+345
| | | | | | | | | | | | | | | | | | | | works with. SelectionDAG, FunctionLoweringInfo, and SelectionDAGLowering objects now get created once per SelectionDAGISel instance, and can be reused across blocks and across functions. Previously, they were created and destroyed each time they were needed. This reorganization simplifies the handling of PHI nodes, and also SwitchCases, JumpTables, and BitTestBlocks. This simplification has the side effect of fixing a bug in FastISel where successor PHI nodes weren't being updated correctly. This is also a step towards making the transition from FastISel into and out of SelectionDAG faster, and also making plain SelectionDAG faster on code with lots of little blocks. llvm-svn: 55450
* Add a helper method that will be used to support EXTRACT_SUBREG for ↵Owen Anderson2008-08-271-0/+11
| | | | | | selecting trunc's in fast-isel. llvm-svn: 55439
* Move the check whether it's worth remating to caller.Evan Cheng2008-08-272-3/+2
| | | | llvm-svn: 55434
* Fix FastISel's bitcast code for the case where getRegForValue fails.Dan Gohman2008-08-271-1/+4
| | | | llvm-svn: 55431
* Refactor isSafeToReMat out of 2addr pass.Evan Cheng2008-08-272-29/+26
| | | | llvm-svn: 55430
* Use TargetLowering to get the types in fast isel, which handles pointer ↵Owen Anderson2008-08-271-4/+4
| | | | | | types correctly for our purposes. llvm-svn: 55428
* Don't check TLI.getOperationAction. The FastISel way is toDan Gohman2008-08-271-6/+2
| | | | | | | just try to do the action and let the tablegen-generated code determine if there is target-support for an operation. llvm-svn: 55427
* Add a new FastISel method, getRegForValue, which takes care ofDan Gohman2008-08-271-133/+95
| | | | | | | the details of materializing constants and other values into registers, and make use of it in several places. llvm-svn: 55426
* Add a comment about the current floating-point constant code in FastISel.Dan Gohman2008-08-271-0/+6
| | | | llvm-svn: 55425
* Optimize ScheduleDAGRRList's topological sort to use one pass insteadDan Gohman2008-08-271-19/+8
| | | | | | | | of two, and to not need a scratch std::vector. Also, compute the ordering immediately in the result array, instead of in another scratch std::vector that is copied to the result array. llvm-svn: 55421
* Optimize ScheduleDAG's ComputeDepths and ComputeHeights to not needDan Gohman2008-08-271-14/+14
| | | | | | a scratch std::vector. llvm-svn: 55420
* Remove the std::ostream form of PseudoSourceValue's print,Dan Gohman2008-08-271-3/+0
| | | | | | which isn't needed anymore. llvm-svn: 55419
* Basic FastISel support for floating-point constants.Dan Gohman2008-08-271-0/+74
| | | | llvm-svn: 55401
* Fix handling of inttoptr and ptrtoint when unhandled operands are present.Owen Anderson2008-08-271-2/+6
| | | | llvm-svn: 55400
* Add support for fast isel of inttoptr and ptrtoint in the cases where ↵Owen Anderson2008-08-271-0/+19
| | | | | | truncation is not needed. llvm-svn: 55399
* Factor out a large amoutn of the cast handling code in fast isel into helper ↵Owen Anderson2008-08-261-107/+81
| | | | | | | | methods. This simultaneously makes the code simpler and adds support for sext as well. llvm-svn: 55398
* Add support for fast isel of zext.Owen Anderson2008-08-261-0/+29
| | | | llvm-svn: 55396
* disallow direct access to SDValue::ResNo, provide a getter insteadGabor Greif2008-08-267-56/+56
| | | | llvm-svn: 55394
* Add support for fptosi of constants in fast isel.Owen Anderson2008-08-261-3/+29
| | | | llvm-svn: 55393
* Optimize SelectionDAG's topological sort to use one pass insteadDan Gohman2008-08-262-56/+12
| | | | | | | | of two, and to not need a scratch std::vector. Also, use the SelectionDAG's topological sort in LegalizeDAG instead of having a separate implementation. llvm-svn: 55389
* Refactor the bitcast code into its own function.Dan Gohman2008-08-261-58/+69
| | | | llvm-svn: 55387
* Make FastISel use the correct argument type when casting GEP indices.Dan Gohman2008-08-261-6/+7
| | | | llvm-svn: 55384
* Don't select binary instructions with illegal types.Dan Gohman2008-08-261-0/+6
| | | | llvm-svn: 55383
* Add support for fast isel of sitofp, and remove some unnecessary and ↵Owen Anderson2008-08-261-4/+28
| | | | | | imprecise legality checks. llvm-svn: 55381
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