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* Fix a bug which prevented tail merging of return instructions inDan Gohman2010-05-031-24/+5
| | | | | | | | | | | | | | | | | | | | beneficial cases. See the changes in test/CodeGen/X86/tail-opts.ll and test/CodeGen/ARM/ifcvt2.ll for details. The fix is to change HashEndOfMBB to hash at most one instruction, instead of trying to apply heuristics about when it will be profitable to consider more than one instruction. The regular tail-merging heuristics are already prepared to handle the same cases, and they're more precise. Also, make test/CodeGen/ARM/ifcvt5.ll and test/CodeGen/Thumb2/thumb2-branch.ll slightly more complex so that they continue to test what they're intended to test. And, this eliminates the problem in test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll, the testcase from PR5204. Update it accordingly. llvm-svn: 102907
* Don't count debug info as instructions. This wasDale Johannesen2010-05-011-1/+2
| | | | | | | | preventing the emission of the NOP on Darwin for a function with no actual code. From timberwolfmc with TEST=optllcdbg. llvm-svn: 102843
* Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1),Anton Korobeynikov2010-05-011-1/+6
| | | | | | when needed. This fixes PR7001 llvm-svn: 102838
* Remove the code for special-casing byval for fast-isel. SelectionDAGDan Gohman2010-05-012-21/+3
| | | | | | | handles argument lowering anyway, so there's no need for special casing here. llvm-svn: 102828
* Re-disable kill flags, as there is more trouble.Dan Gohman2010-05-011-0/+4
| | | | llvm-svn: 102826
* Re-enable kill flags from SelectionDAGISel, with a fix: don'tDan Gohman2010-05-011-5/+1
| | | | | | try to put a kill flag on a DBG_INFO instruction. llvm-svn: 102820
* Fix a bug where debug info affected stack slot coloring.Dale Johannesen2010-05-011-1/+2
| | | | | | | Seen in SingleSrc/Benchmarks/Misc/flops with TEST=optllcdbg. 7929951. llvm-svn: 102819
* Fix whitespace.Dan Gohman2010-05-011-1/+1
| | | | llvm-svn: 102817
* Don't pass SDValues by non-const reference unless they may beDan Gohman2010-05-012-2/+3
| | | | | | modified. llvm-svn: 102816
* Reorgnaize more switch code lowering to clean up some trickyDan Gohman2010-05-012-22/+22
| | | | | | | | | | | code, and to eliminate the need for the SelectionDAGBuilder state to be live during CodeGenAndEmitDAG calls. Call SDB->clear() before CodeGenAndEmitDAG calls instead of before it, and move the CurDAG->clear() out of SelectionDAGBuilder, which doesn't own the DAG, and into CodeGenAndEmitDAG. llvm-svn: 102814
* Delete the EdgeMapping variable itself.Dan Gohman2010-05-012-5/+0
| | | | llvm-svn: 102810
* Get rid of the EdgeMapping map. Instead, just check for BasicBlockDan Gohman2010-05-018-35/+19
| | | | | | changes before doing phi lowering for switches. llvm-svn: 102809
* EXTRACT_VECTOR_ELT of an INSERT_VECTOR_ELT may have the same index, but theBill Wendling2010-04-301-8/+13
| | | | | | | | indexes could be of a different value type. Or not even using the same SDNode for the constant (weird, I know). Compare the actual values instead of the pointers. llvm-svn: 102791
* Remove this debug output. The MachineFunction will be printed once all ofDan Gohman2010-04-301-3/+0
| | | | | | | instruction selection is done; it's confusing to see parts of it printed, while other parts are omitted, along the way. llvm-svn: 102771
* The local register allocator has to spill dirty callee saved registers before aJakob Stoklund Olesen2010-04-301-6/+33
| | | | | | | | | | call that might throw. The landing pad assumes that all registers are in stack slots. We used to spill those dirty CSRs after the call, and the stack slots would be wrong when arriving at the landing pad. llvm-svn: 102770
* Attach AT_APPLE_optimized attribute to optimized function's debug info.Devang Patel2010-04-301-5/+8
| | | | llvm-svn: 102743
* EmitDbgValue doesn't need its EdgeMapping argument.Dan Gohman2010-04-303-12/+10
| | | | llvm-svn: 102742
* Don't use floating point in SimpleRegisterCoalescing.Jakob Stoklund Olesen2010-04-301-15/+10
| | | | | | Rounding differences causes tests to fail on Linux. llvm-svn: 102729
* Apply a patch from Jan Sjodin to fix a compiler abort on vectorDan Gohman2010-04-301-9/+24
| | | | | | | comparisons sign-extended to a different bitwidth than the comparison operands. llvm-svn: 102721
* Temporarily disable SelectionDAG kill flags, which are causing trouble.Dan Gohman2010-04-301-0/+4
| | | | llvm-svn: 102680
* Set register kill flags on the SelectionDAG path, at least in theDan Gohman2010-04-301-1/+12
| | | | | | easy cases. llvm-svn: 102678
* Reject really weird coalescer case when trying to merge identical subregistersJakob Stoklund Olesen2010-04-291-0/+7
| | | | | | | | | | | | | of different register classes. e.g. %reg1048:3<def> = EXTRACT_SUBREG %RAX<kill>, 3 Where %reg1048 is a GR32 register. This is not impossible to handle, but it is pretty hard and very rare. This should unbreak the dragonegg builder. llvm-svn: 102672
* Fix typos in assertion strings.Dan Gohman2010-04-291-2/+2
| | | | llvm-svn: 102666
* Slightly verboser debug spew from coalescerJakob Stoklund Olesen2010-04-292-26/+25
| | | | llvm-svn: 102663
* Refactor.Devang Patel2010-04-291-4/+2
| | | | llvm-svn: 102661
* Make naked functions work on PPC.Dale Johannesen2010-04-291-0/+4
| | | | llvm-svn: 102657
* Print variable scope name in DEBUG_VALUE comment. Useful in some cases. e.g.Devang Patel2010-04-291-0/+2
| | | | | | | | | | ##DEBUG_VALUE: runOnMachineFunction:this <- RDI+0 ##DEBUG_VALUE: runOnMachineFunction:fn <- RSI+0 ##DEBUG_VALUE: DeadDefs <- undef ## SimpleRegisterCoalescing.cpp:2706 ##DEBUG_VALUE: getRegInfo:this <- [%rsp+$56]+$0 ##DEBUG_VALUE: getTarget:this <- [%rsp+$56]+$0 llvm-svn: 102655
* Remove DBG_VALUE which reference dead stack slots.Evan Cheng2010-04-291-2/+19
| | | | llvm-svn: 102654
* DO not push DBG_VALUE machine instructions for inlined fuction arguments in ↵Devang Patel2010-04-291-0/+7
| | | | | | entry block. llvm-svn: 102653
* Add comment.Evan Cheng2010-04-291-0/+2
| | | | llvm-svn: 102606
* Re-enable 102565 with fixes.Evan Cheng2010-04-292-14/+8
| | | | llvm-svn: 102602
* Temporarily disable my changes to unbreak the build.Evan Cheng2010-04-292-0/+8
| | | | llvm-svn: 102590
* Do not generate duplicate dbg_value instructions for function arguments.Evan Cheng2010-04-292-9/+11
| | | | llvm-svn: 102585
* Fix missing #include.Dan Gohman2010-04-291-0/+1
| | | | llvm-svn: 102584
* Avoid emitting a dbg_value machineinstr that's not going to be inserted into ↵Evan Cheng2010-04-292-2/+2
| | | | | | entry block. llvm-svn: 102581
* Check Reg against zero.Evan Cheng2010-04-292-1/+3
| | | | llvm-svn: 102573
* - Really preserve dbg_value instructions when the register is spilled.Evan Cheng2010-04-281-2/+3
| | | | | | - Also, update dbg_value is the value is being re-matted from a frame slot, e.g. fixed slots for arguments. llvm-svn: 102565
* tidy up.Devang Patel2010-04-281-8/+2
| | | | llvm-svn: 102558
* Replace r102368 with code that's less fragile. This creates DBG_VALUE ↵Evan Cheng2010-04-286-33/+77
| | | | | | instructions for function arguments early and insert them after instruction selection is done. llvm-svn: 102554
* Pretty print DBG_VALUE machine instructions.Evan Cheng2010-04-281-1/+9
| | | | | | | | | Before: DBG_VALUE %RSI, 0, !-1; dbg:SimpleRegisterCoalescing.cpp:2707 Now: DBG_VALUE %RSI, 0, !"this"; dbg:SimpleRegisterCoalescing.cpp:2707 llvm-svn: 102518
* Rework global alignment computation again. Now we do round upChris Lattner2010-04-281-19/+37
| | | | | | | | alignment of globals to the preferred alignment, but only when there is no section specified on the global (by far the common case). llvm-svn: 102515
* While lowering dbg_declare, emit DBG_VALUE machine instruction if alloca ↵Devang Patel2010-04-281-11/+11
| | | | | | matching llvm.dbg.declare intrinsic is missing. llvm-svn: 102513
* Recompute kill flags from live intervals after coalescing instead of trying toJakob Stoklund Olesen2010-04-282-49/+21
| | | | | | | | | | | update them. Computing kill flags is notoriously difficult, and the coalescer would get it wrong sometimes, and it would completely skip physical registers. Now we simply remove kill flags based on the live intervals after coalescing. This is a few percent slower, but now we get correct kill flags for physical registers after coalescing. llvm-svn: 102510
* Try operation promotion only if regular dag combine and target-specific ones ↵Evan Cheng2010-04-281-15/+42
| | | | | | failed to do anything. llvm-svn: 102492
* Emit debug info for byval parameters.Devang Patel2010-04-282-4/+15
| | | | llvm-svn: 102486
* further simplify EmitAlignment by eliminating the Chris Lattner2010-04-281-5/+2
| | | | | | ForcedAlignBits argument, tweaking the single client of it. llvm-svn: 102484
* remove a dead argument to EmitAlignment.Chris Lattner2010-04-281-2/+1
| | | | llvm-svn: 102483
* remove some default arguments to EmitAlignment.Chris Lattner2010-04-282-8/+6
| | | | llvm-svn: 102482
* Refactor. Devang Patel2010-04-282-50/+87
| | | | llvm-svn: 102481
* Use isReg(), isImm() and isFPImm().Devang Patel2010-04-271-9/+5
| | | | llvm-svn: 102470
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