summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
Commit message (Collapse)AuthorAgeFilesLines
...
* Add a fast-path for register values. Add support for constant pool entries,Chris Lattner2005-08-221-1/+13
| | | | | | | | | | | | | | | | | | | | | allowing us to compile this: float %test2(float* %P) { %Q = load float* %P %R = add float %Q, 10.1 ret float %R } to this: _test2: lfs r2, 0(r3) lis r3, ha16(.CPI_test2_0) lfs r3, lo16(.CPI_test2_0)(r3) fadds f1, r2, r3 blr llvm-svn: 22962
* add anew methodChris Lattner2005-08-211-0/+10
| | | | llvm-svn: 22957
* Add support for frame index nodesChris Lattner2005-08-211-3/+4
| | | | llvm-svn: 22956
* add a methodChris Lattner2005-08-211-0/+9
| | | | llvm-svn: 22955
* add a methodChris Lattner2005-08-211-0/+9
| | | | llvm-svn: 22949
* Add support for basic blocks, fix a bug in result # computationChris Lattner2005-08-211-2/+7
| | | | llvm-svn: 22948
* When legalizing brcond ->brcc or select -> selectcc, make sure to truncateChris Lattner2005-08-211-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the old condition to a one bit value. The incoming value must have been promoted, and the top bits are undefined. This causes us to generate: _test: rlwinm r2, r3, 0, 31, 31 li r3, 17 cmpwi cr0, r2, 0 bne .LBB_test_2 ; .LBB_test_1: ; li r3, 1 .LBB_test_2: ; blr instead of: _test: rlwinm r2, r3, 0, 31, 31 li r2, 17 cmpwi cr0, r3, 0 bne .LBB_test_2 ; .LBB_test_1: ; li r2, 1 .LBB_test_2: ; or r3, r2, r2 blr for: int %test(bool %c) { %retval = select bool %c, int 17, int 1 ret int %retval } llvm-svn: 22947
* fix bogus warningChris Lattner2005-08-201-1/+1
| | | | llvm-svn: 22943
* Add support for global address nodesChris Lattner2005-08-191-0/+3
| | | | llvm-svn: 22940
* Add support for TargetGlobalAddress nodesChris Lattner2005-08-191-1/+14
| | | | llvm-svn: 22938
* Implement CopyFromReg, TokenFactor, and fix a bug in CopyToReg. This allowsChris Lattner2005-08-191-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | us to compile stuff like this: double %test(double %A, double %B, double %C, double %E) { %F = mul double %A, %A %G = add double %F, %B %H = sub double -0.0, %G %I = mul double %H, %C %J = add double %I, %E ret double %J } to: _test: fnmadd f0, f1, f1, f2 fmadd f1, f0, f3, f4 blr woot! llvm-svn: 22937
* Fix a bug in previous commitChris Lattner2005-08-191-1/+2
| | | | llvm-svn: 22936
* Print physreg register nodes with target names (e.g. F1) instead of numbersChris Lattner2005-08-192-2/+12
| | | | llvm-svn: 22934
* Before implementing copyfromreg, we'll implement copytoreg correctly.Chris Lattner2005-08-191-2/+6
| | | | | | | | | | | | | This gets us this for the previous testcase: _test: lis r2, 0 ori r3, r2, 65535 blr Note that we actually write to r3 (the return reg) correctly now :) llvm-svn: 22933
* Now that we have operand info for machine instructions, use it to createChris Lattner2005-08-191-8/+21
| | | | | | | | | | | | | | | | | | temporary registers for things that define a register. This allows dag->dag isel to compile this: int %test() { ret int 65535 } into: _test: lis r2, 0 ori r2, r2, 65535 blr Next up, getting CopyFromReg to work, allowing arguments and cross-bb values. llvm-svn: 22932
* Fix VC++ constant truncation warning.Jeff Cohen2005-08-191-2/+2
| | | | llvm-svn: 22907
* Fix VC++ precedence warning.Jeff Cohen2005-08-191-1/+1
| | | | llvm-svn: 22902
* Fix computation of # operands, add a temporary hack for CopyToRegChris Lattner2005-08-191-6/+17
| | | | llvm-svn: 22896
* add a new -view-sched-dags option to view dags as they are sent to the ↵Chris Lattner2005-08-181-0/+10
| | | | | | scheduler. llvm-svn: 22878
* Implement the first chunk of a code emitter. This is sophisticated enough toChris Lattner2005-08-181-1/+94
| | | | | | | | | | | | codegen: _empty: .LBB_empty_0: ; blr but can't do anything more (yet). :) llvm-svn: 22876
* new file, obviously just a stubChris Lattner2005-08-181-0/+23
| | | | llvm-svn: 22868
* Enable critical edge splitting by defaultChris Lattner2005-08-181-16/+10
| | | | llvm-svn: 22863
* Add support for target DAG nodes that take 4 operands, such as PowerPC'sNate Begeman2005-08-181-0/+8
| | | | | | rlwinm. llvm-svn: 22856
* Fix printing of VTSDNodesChris Lattner2005-08-182-0/+5
| | | | llvm-svn: 22853
* Move the code dependency for MathExtras.h from SelectionDAGNodes.h.Jim Laskey2005-08-171-1/+21
| | | | | | Added some class dividers in SelectionDAG.cpp. llvm-svn: 22841
* Culling out use of unions for converting FP to bits and vice versa.Jim Laskey2005-08-173-44/+16
| | | | llvm-svn: 22838
* Fix a bug in RemoveDeadNodes where it would crash when its "optional"Chris Lattner2005-08-171-1/+77
| | | | | | | | argument is not specified. Implement ReplaceAllUsesWith. llvm-svn: 22834
* Switched to using BitsToDouble for int_to_float to avoid aliasing problem.Jim Laskey2005-08-171-4/+4
| | | | llvm-svn: 22831
* Change hex float constants for the sake of VC++.Jim Laskey2005-08-171-1/+4
| | | | llvm-svn: 22828
* Add a new beta option for critical edge splitting, to avoid a problem thatChris Lattner2005-08-171-0/+23
| | | | | | | | | Nate noticed in yacr2 (and I know occurs in other places as well). This is still rough, as the critical edge blocks are not intelligently placed but is added to get some idea to see if this improves performance. llvm-svn: 22825
* Fix a regression on X86, where FP values can be promoted too.Chris Lattner2005-08-171-1/+4
| | | | llvm-svn: 22822
* Added generic code expansion for [signed|unsigned] i32 to [f32|f64] casts in theJim Laskey2005-08-171-11/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | legalizer. PowerPC now uses this expansion instead of ISel version. Example: // signed integer to double conversion double f1(signed x) { return (double)x; } // unsigned integer to double conversion double f2(unsigned x) { return (double)x; } // signed integer to float conversion float f3(signed x) { return (float)x; } // unsigned integer to float conversion float f4(unsigned x) { return (float)x; } Byte Code: internal fastcc double %_Z2f1i(int %x) { entry: %tmp.1 = cast int %x to double ; <double> [#uses=1] ret double %tmp.1 } internal fastcc double %_Z2f2j(uint %x) { entry: %tmp.1 = cast uint %x to double ; <double> [#uses=1] ret double %tmp.1 } internal fastcc float %_Z2f3i(int %x) { entry: %tmp.1 = cast int %x to float ; <float> [#uses=1] ret float %tmp.1 } internal fastcc float %_Z2f4j(uint %x) { entry: %tmp.1 = cast uint %x to float ; <float> [#uses=1] ret float %tmp.1 } internal fastcc double %_Z2g1i(int %x) { entry: %buffer = alloca [2 x uint] ; <[2 x uint]*> [#uses=3] %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0 ; <uint*> [#uses=1] store uint 1127219200, uint* %tmp.0 %tmp.2 = cast int %x to uint ; <uint> [#uses=1] %tmp.3 = xor uint %tmp.2, 2147483648 ; <uint> [#uses=1] %tmp.5 = getelementptr [2 x uint]* %buffer, int 0, int 1 ; <uint*> [#uses=1] store uint %tmp.3, uint* %tmp.5 %tmp.9 = cast [2 x uint]* %buffer to double* ; <double*> [#uses=1] %tmp.10 = load double* %tmp.9 ; <double> [#uses=1] %tmp.13 = load double* cast (long* %signed_bias to double*) ; <double> [#uses=1] %tmp.14 = sub double %tmp.10, %tmp.13 ; <double> [#uses=1] ret double %tmp.14 } internal fastcc double %_Z2g2j(uint %x) { entry: %buffer = alloca [2 x uint] ; <[2 x uint]*> [#uses=3] %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0 ; <uint*> [#uses=1] store uint 1127219200, uint* %tmp.0 %tmp.1 = getelementptr [2 x uint]* %buffer, int 0, int 1 ; <uint*> [#uses=1] store uint %x, uint* %tmp.1 %tmp.4 = cast [2 x uint]* %buffer to double* ; <double*> [#uses=1] %tmp.5 = load double* %tmp.4 ; <double> [#uses=1] %tmp.8 = load double* cast (long* %unsigned_bias to double*) ; <double> [#uses=1] %tmp.9 = sub double %tmp.5, %tmp.8 ; <double> [#uses=1] ret double %tmp.9 } internal fastcc float %_Z2g3i(int %x) { entry: %buffer = alloca [2 x uint] ; <[2 x uint]*> [#uses=3] %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0 ; <uint*> [#uses=1] store uint 1127219200, uint* %tmp.0 %tmp.2 = cast int %x to uint ; <uint> [#uses=1] %tmp.3 = xor uint %tmp.2, 2147483648 ; <uint> [#uses=1] %tmp.5 = getelementptr [2 x uint]* %buffer, int 0, int 1 ; <uint*> [#uses=1] store uint %tmp.3, uint* %tmp.5 %tmp.9 = cast [2 x uint]* %buffer to double* ; <double*> [#uses=1] %tmp.10 = load double* %tmp.9 ; <double> [#uses=1] %tmp.13 = load double* cast (long* %signed_bias to double*) ; <double> [#uses=1] %tmp.14 = sub double %tmp.10, %tmp.13 ; <double> [#uses=1] %tmp.16 = cast double %tmp.14 to float ; <float> [#uses=1] ret float %tmp.16 } internal fastcc float %_Z2g4j(uint %x) { entry: %buffer = alloca [2 x uint] ; <[2 x uint]*> [#uses=3] %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0 ; <uint*> [#uses=1] store uint 1127219200, uint* %tmp.0 %tmp.1 = getelementptr [2 x uint]* %buffer, int 0, int 1 ; <uint*> [#uses=1] store uint %x, uint* %tmp.1 %tmp.4 = cast [2 x uint]* %buffer to double* ; <double*> [#uses=1] %tmp.5 = load double* %tmp.4 ; <double> [#uses=1] %tmp.8 = load double* cast (long* %unsigned_bias to double*) ; <double> [#uses=1] %tmp.9 = sub double %tmp.5, %tmp.8 ; <double> [#uses=1] %tmp.11 = cast double %tmp.9 to float ; <float> [#uses=1] ret float %tmp.11 } PowerPC Code: .machine ppc970 .const .align 2 .CPIl1__Z2f1i_0: ; float 0x4330000080000000 .long 1501560836 ; float 4.5036e+15 .text .align 2 .globl l1__Z2f1i l1__Z2f1i: .LBBl1__Z2f1i_0: ; entry xoris r2, r3, 32768 stw r2, -4(r1) lis r2, 17200 stw r2, -8(r1) lfd f0, -8(r1) lis r2, ha16(.CPIl1__Z2f1i_0) lfs f1, lo16(.CPIl1__Z2f1i_0)(r2) fsub f1, f0, f1 blr .const .align 2 .CPIl2__Z2f2j_0: ; float 0x4330000000000000 .long 1501560832 ; float 4.5036e+15 .text .align 2 .globl l2__Z2f2j l2__Z2f2j: .LBBl2__Z2f2j_0: ; entry stw r3, -4(r1) lis r2, 17200 stw r2, -8(r1) lfd f0, -8(r1) lis r2, ha16(.CPIl2__Z2f2j_0) lfs f1, lo16(.CPIl2__Z2f2j_0)(r2) fsub f1, f0, f1 blr .const .align 2 .CPIl3__Z2f3i_0: ; float 0x4330000080000000 .long 1501560836 ; float 4.5036e+15 .text .align 2 .globl l3__Z2f3i l3__Z2f3i: .LBBl3__Z2f3i_0: ; entry xoris r2, r3, 32768 stw r2, -4(r1) lis r2, 17200 stw r2, -8(r1) lfd f0, -8(r1) lis r2, ha16(.CPIl3__Z2f3i_0) lfs f1, lo16(.CPIl3__Z2f3i_0)(r2) fsub f0, f0, f1 frsp f1, f0 blr .const .align 2 .CPIl4__Z2f4j_0: ; float 0x4330000000000000 .long 1501560832 ; float 4.5036e+15 .text .align 2 .globl l4__Z2f4j l4__Z2f4j: .LBBl4__Z2f4j_0: ; entry stw r3, -4(r1) lis r2, 17200 stw r2, -8(r1) lfd f0, -8(r1) lis r2, ha16(.CPIl4__Z2f4j_0) lfs f1, lo16(.CPIl4__Z2f4j_0)(r2) fsub f0, f0, f1 frsp f1, f0 blr llvm-svn: 22814
* add a new TargetConstant nodeChris Lattner2005-08-171-1/+19
| | | | llvm-svn: 22813
* Eliminate the RegSDNode class, which 3 nodes (CopyFromReg/CopyToReg/ImplicitDef)Chris Lattner2005-08-164-54/+82
| | | | | | | | | | | | | | used to tack a register number onto the node. Instead of doing this, make a new node, RegisterSDNode, which is a leaf containing a register number. These three operations just become normal DAG nodes now, instead of requiring special handling. Note that with this change, it is no longer correct to make illegal CopyFromReg/CopyToReg nodes. The legalizer will not touch them, and this is bad, so don't do it. :) llvm-svn: 22806
* Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nastyNate Begeman2005-08-162-12/+139
| | | | | | | fixme from the PowerPC backend. Emit slightly better code for legalizing select_cc. llvm-svn: 22805
* Allow passing a dag into dump and getOperationName. If one is availableChris Lattner2005-08-161-9/+21
| | | | | | | when printing a node, use it to render target operations with their target instruction name instead of "<<unknown>>". llvm-svn: 22804
* Use a extant helper to do this.Chris Lattner2005-08-161-19/+7
| | | | llvm-svn: 22802
* Add some methods for dag->dag isel.Chris Lattner2005-08-162-19/+59
| | | | | | Split RemoveNodeFromCSEMaps out of DeleteNodesIfDead to do it. llvm-svn: 22801
* Fix last night's PPC32 regressions byNate Begeman2005-08-141-0/+1
| | | | | | | | | 1. Not selecting the false value of a select_cc in the false arm, which isn't legal for nested selects. 2. Actually returning the node we created and Legalized in the FP_TO_UINT Expander. llvm-svn: 22789
* Teach the legalizer how to legalize FP_TO_UINT.Nate Begeman2005-08-141-3/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Teach the legalizer to promote FP_TO_UINT to FP_TO_SINT if the wider FP_TO_UINT is also illegal. This allows us on PPC to codegen unsigned short foo(float a) { return a; } as: _foo: .LBB_foo_0: ; entry fctiwz f0, f1 stfd f0, -8(r1) lwz r2, -4(r1) rlwinm r3, r2, 0, 16, 31 blr instead of: _foo: .LBB_foo_0: ; entry fctiwz f0, f1 stfd f0, -8(r1) lwz r2, -4(r1) lis r3, ha16(.CPI_foo_0) lfs f0, lo16(.CPI_foo_0)(r3) fcmpu cr0, f1, f0 blt .LBB_foo_2 ; entry .LBB_foo_1: ; entry fsubs f0, f1, f0 fctiwz f0, f0 stfd f0, -16(r1) lwz r2, -12(r1) xoris r2, r2, 32768 .LBB_foo_2: ; entry rlwinm r3, r2, 0, 16, 31 blr llvm-svn: 22785
* Remove an unncessary argument to SimplifySelectCC and add an additionalNate Begeman2005-08-131-8/+10
| | | | | | assert when creating a select_cc node. llvm-svn: 22780
* Fix the fabs regression on x86 by abstracting the select_cc optimizationNate Begeman2005-08-131-68/+83
| | | | | | | out into SimplifySelectCC. This allows both ISD::SELECT and ISD::SELECT_CC to use the same set of simplifying folds. llvm-svn: 22779
* implement a couple of simple shift foldings.Chris Lattner2005-08-121-0/+18
| | | | | | e.g. (X & 7) >> 3 -> 0 llvm-svn: 22774
* Add a select_cc optimization for recognizing abs(int). This speeds up anNate Begeman2005-08-111-0/+16
| | | | | | integer MPEG encoding loop by a factor of two. llvm-svn: 22758
* Some SELECT_CC cleanups:Nate Begeman2005-08-112-53/+61
| | | | | | | | | | | | 1. move assertions for node creation to getNode() 2. legalize the values returned in ExpandOp immediately 3. Move select_cc optimizations from SELECT's getNode() to SELECT_CC's, allowing them to be cleaned up significantly. This paves the way to pick up additional optimizations on SELECT_CC, such as sum-of-absolute-differences. llvm-svn: 22757
* Add new node, SELECT_CC. This node is for targets that don't nativelyNate Begeman2005-08-102-3/+53
| | | | | | implement SELECT. llvm-svn: 22755
* Fix an oversight that may be causing PR617.Chris Lattner2005-08-101-4/+13
| | | | llvm-svn: 22753
* Fix spelling, fix some broken canonicalizations by my last patchChris Lattner2005-08-091-12/+11
| | | | llvm-svn: 22734
* add cc nodes to the AllNodes list so they show up in Graphviz outputChris Lattner2005-08-091-1/+3
| | | | llvm-svn: 22731
* Eliminate the SetCCSDNode in favor of a CondCodeSDNode class. This pulls theChris Lattner2005-08-093-175/+185
| | | | | | | | CC out of the SetCC operation, making SETCC a standard ternary operation and CC's a standard DAG leaf. This will make it possible for other node to use CC's as operands in the future... llvm-svn: 22728
OpenPOWER on IntegriCloud