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* This reverts r302984Vivek Pandya2017-05-131-2/+0
| | | | llvm-svn: 302985
* Simplify MIR Output used for Codegen TestingVivek Pandya2017-05-131-0/+2
| | | | | | | | | | | | | | - MIRYamlMapping: Default value provided for fields which have optional mappings. Implemented == operators for required classes. When a field's value is same as default value specified YAML IO class will not print it. - MIRPrinter: Above mentioned behaviour is not on by default. If -simplify-mir option not specified, then make yaml::Output to print fields with default values too. Differential Revision: https://reviews.llvm.org/D32304 llvm-svn: 302984
* [GISel]: Add a getConstantFPVRegVal utilityAditya Nandakumar2017-05-121-0/+8
| | | | | | | | This might be useful across various GISel Passes https://reviews.llvm.org/D33051 llvm-svn: 302964
* [GISel]: Fix undefined behavior while accessing DefaultAction mapAditya Nandakumar2017-05-121-1/+1
| | | | | | | | We end up dereferencing the end iterator here when the Aspect doesn't exist in the DefaultAction map. Change the API to return Optional<LLT> and return None when not found. Also update the callers to handle the None case llvm-svn: 302963
* Add LiveRangeShrink pass to shrink live range within BB.Dehao Chen2017-05-124-0/+216
| | | | | | | | | | | | | | Summary: LiveRangeShrink pass moves instruction right after the definition with the same BB if the instruction and its operands all have more than one use. This pass is inexpensive and guarantees optimal live-range within BB. Reviewers: davidxl, wmi, hfinkel, MatzeB, andreadb Reviewed By: MatzeB, andreadb Subscribers: hiraditya, jyknight, sanjoy, skatkov, gberry, jholewinski, qcolombet, javed.absar, krytarowski, atrick, spatel, RKSimon, andreadb, MatzeB, mehdi_amini, mgorny, efriedma, davide, dberlin, llvm-commits Differential Revision: https://reviews.llvm.org/D32563 llvm-svn: 302938
* [PPC] Move the combine "a << (b % (sizeof(a) * 8)) -> (PPCshl a, b)" to the ↵Tim Shen2017-05-121-33/+0
| | | | | | | | | | | | | | | | | | | | | | backend. NFC. Summary: Eli pointed out that it's unsafe to combine the shifts to ISD::SHL etc., because those are not defined for b > sizeof(a) * 8, even after some of the combiners run. However, PPCISD::SHL defines that behavior (as the instructions themselves). Move the combination to the backend. The tests in shift_mask.ll still pass. Reviewers: echristo, hfinkel, efriedma, iteratee Subscribers: nemanjai, llvm-commits Differential Revision: https://reviews.llvm.org/D33076 llvm-svn: 302937
* [KnownBits] Add bit counting methods to KnownBits struct and use them where ↵Craig Topper2017-05-122-31/+26
| | | | | | | | | | | | possible This patch adds min/max population count, leading/trailing zero/one bit counting methods. The min methods return answers based on bits that are known without considering unknown bits. The max methods give answers taking into account the largest count that unknown bits could give. Differential Revision: https://reviews.llvm.org/D32931 llvm-svn: 302925
* [codeview] Fix assertion failure introduced in r295354 refactoringReid Kleckner2017-05-121-2/+1
| | | | | | | | CodeViewDebug sets Asm to nullptr to disable debug info generation. You can get a .ll file like no-cus.ll from 'clang -gcodeview -g0', which happens in the ubsan test suite. llvm-svn: 302923
* [DAGCombine] Use SelectionDAG::getAnyExtOrTrunc helper. NFCI.Simon Pilgrim2017-05-121-8/+2
| | | | llvm-svn: 302907
* [DAGCombine] Use SelectionDAG::getZExtOrTrunc helper. NFCI.Simon Pilgrim2017-05-121-8/+2
| | | | llvm-svn: 302897
* Use SDValue::getOperand() helper. NFCI.Simon Pilgrim2017-05-122-22/+19
| | | | llvm-svn: 302896
* Handle a COPY with undef source operand in LowerCopy()Jonas Paulsson2017-05-121-2/+3
| | | | | | | | | | | | | Llvm-stress discovered that a COPY may end up in ExpandPostRA::LowerCopy() with an undef source operand. It is not possible for the target to handle this, as this flag is not passed to TII->copyPhysReg(). This patch solves this by treating such a COPY as an identity COPY. Review: Matthias Braun https://reviews.llvm.org/D32892 llvm-svn: 302877
* [IfConversion] Keep the CFG updated incrementally in IfConvertTriangleMikael Holmen2017-05-121-6/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Instead of using RemoveExtraEdges (which uses analyzeBranch, which cannot always be trusted) at the end to fixup the CFG we keep the CFG updated as we go along and remove or add branches and merge blocks. This way we won't have any problems if the involved MBBs contain unanalyzable instructions. This fixes PR32721. In that case we had a triangle EBB | \ | | | TBB | / FBB where FBB didn't have any successors at all since it ended with an unconditional return. Then TBB and FBB were be merged into EBB, but EBB would still keep its successors, and the use of analyzeBranch and CorrectExtraCFGEdges wouldn't help to remove them since the return instruction is not analyzable (at least not on ARM). Reviewers: kparzysz, iteratee, MatzeB Reviewed By: iteratee Subscribers: aemerson, rengolin, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D33037 llvm-svn: 302876
* DWARF: Avoid cross-CU references under FissionDavid Blaikie2017-05-127-70/+116
| | | | | | | | | | | | | | | | | | Turns out that the Fission/Split DWARF package format (DWP) is currently insufficient to handle cross-CU (ref_addr) references. So for now, duplicate any debug info needed in these situations: * inlined_subroutine's abstract_origin * inlined variable's abstract_origin * types Keep the ref_addr behavior in general, including in the split DWARF inline debug info that can be emitted into the object files for online symbolication. Keep a flag to use the old (ref_addr) behavior for testing ways of addressing this limitation in the DWP tool (& for those not using DWP packaging). llvm-svn: 302858
* [GISel]: Remove unused lambda captures. NFCAditya Nandakumar2017-05-111-4/+4
| | | | | | https://reviews.llvm.org/D33085 llvm-svn: 302831
* [MSP430] Generate EABI-compliant libcallsVadzim Dambrouski2017-05-111-0/+1
| | | | | | | | | | | | | Updates the MSP430 target to generate EABI-compatible libcall names. As a byproduct, adjusts the hardware multiplier options available in the MSP430 target, adds support for promotion of the ISD::MUL operation for 8-bit integers, and correctly marks R11 as used by call instructions. Patch by Andrew Wygle. Differential Revision: https://reviews.llvm.org/D32676 llvm-svn: 302820
* [LiveVariables] Switch Kill/Defs sets to be DenseSet(s).Davide Italiano2017-05-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The testcase in PR32984 shows a non linear compile time increase after a change that made the LoopUnroll pass more aggressive (increasing the threshold). My profiling shows all the time of PHI elimination goes to llvm::LiveVariables::addNewBlock. This is because we keep Defs/Kills registers in a SmallSet and vfind(const T &V); is O(N). Switching to a DenseSet reduces the time spent in the pass from 297 seconds to 97 seconds. Profiling still shows a lot of time is spent iterating the data structure, so I guess there's room for improvement. Dan tells me GCC uses real set operations for live registers and it takes no-time on this testcase. Matthias points out we might want to switch all this to LiveIntervalAnalysis so it's not entirely sure if a rewrite is worth it. Differential Revision: https://reviews.llvm.org/D33088 llvm-svn: 302819
* [DAGCombine] Use SelectionDAG::getAnyExtOrTrunc helper. NFCI.Simon Pilgrim2017-05-111-18/+4
| | | | llvm-svn: 302808
* Strip trailing whitespace. NFCI.Simon Pilgrim2017-05-111-1/+1
| | | | llvm-svn: 302784
* Remove spurious cast of nullptr. NFC.Serge Guelton2017-05-111-1/+1
| | | | | | Conversion rules allow automatic casting of nullptr to any pointer type. llvm-svn: 302780
* Revert "[SDAG] Relax conditions under stores of loaded values can be merged"David L. Jones2017-05-101-22/+10
| | | | | | | | | | | | | | | | | | | | | This reverts r302712. The change fails with ASAN enabled: ERROR: AddressSanitizer: use-after-poison on address ... at ... READ of size 2 at ... thread T0 #0 ... in llvm::SDNode::getNumValues() const <snip>/include/llvm/CodeGen/SelectionDAGNodes.h:855:42 #1 ... in llvm::SDNode::hasAnyUseOfValue(unsigned int) const <snip>/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:7270:3 #2 ... in llvm::SDValue::use_empty() const <snip> include/llvm/CodeGen/SelectionDAGNodes.h:1042:17 #3 ... in (anonymous namespace)::DAGCombiner::MergeConsecutiveStores(llvm::StoreSDNode*) <snip>/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:12944:7 Reviewers: niravd Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D33081 llvm-svn: 302746
* [PHIElimination] Use the same name for DEBUG_TYPE and pass name.Davide Italiano2017-05-101-1/+1
| | | | | | In an attempt to reduce the confusion. llvm-svn: 302742
* [SDAG] Relax conditions under stores of loaded values can be mergedNirav Dave2017-05-101-10/+22
| | | | | | | | | | | | | | | | | | | | | | | | Summary: Allow consecutive stores whose values come from consecutive loads to merged in the presense of other uses of the loads. Previously this was disallowed as in general the merged load cannot be shared with the other uses. Merging N stores into 1 may cause as many as N redundant loads. However in the context of caching this should have neglible affect on memory pressure and reduce instruction count making it almost always a win. Fixes PR32086. Reviewers: spatel, jyknight, andreadb, hfinkel, efriedma Reviewed By: efriedma Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30471 llvm-svn: 302712
* Small refactoring in DAGCombine. NFCAmaury Sechet2017-05-101-3/+3
| | | | llvm-svn: 302699
* [DAGCombiner] Dropped explicit (sra 0, x) -> 0 and (sra -1, x) -> 0 folds.Simon Pilgrim2017-05-101-6/+2
| | | | | | These are both handled (and tested) by the earlier ComputeNumSignBits == EltSizeInBits fold. llvm-svn: 302651
* [IfConversion] Add missing check in IfConversion/canFallThroughToMikael Holmen2017-05-101-1/+2
| | | | | | | | | | | | | | | | | Summary: When trying to figure out if MBB could fallthrough to ToMBB (possibly by falling through a bunch of other MBBs) we didn't actually check if there was fallthrough between the last two blocks in the chain. Reviewers: kparzysz, iteratee, MatzeB Reviewed By: kparzysz, iteratee Subscribers: javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D32996 llvm-svn: 302650
* [DAGCombiner] Add vector support to fold (shl/srl 0, x) -> 0Simon Pilgrim2017-05-101-2/+2
| | | | llvm-svn: 302641
* Add a late IR expansion pass for the experimental reduction intrinsics.Amara Emerson2017-05-103-0/+171
| | | | | | | | | This pass uses a new target hook to decide whether or not to expand a particular intrinsic to the shuffevector sequence. Differential Revision: https://reviews.llvm.org/D32245 llvm-svn: 302631
* [UnreachableBlockElim] Check return value of constrainRegClass().Mikael Holmen2017-05-101-3/+4
| | | | | | | | | | | | | | | | | | | Summary: MachineRegisterInfo::constrainRegClass() can fail if two register classes don't have a common subclass or if the register class doesn't contain enough registers. Check the return value before trying to remove Phi nodes, and if we can't constrain, we output a COPY instead of simply replacing registers. Reviewers: kparzysz, david2050, wmi Reviewed By: kparzysz Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32999 llvm-svn: 302622
* [CodeGen] Don't require AA in TwoAddress at -O0.Ahmed Bougacha2017-05-101-2/+5
| | | | | | | | | | | | | This is a follow-up to r302611, which moved an -O0 computation of DT from SDAGISel to TwoAddress. Don't use it here either, and avoid computing it completely. The only use was forwarding the analysis as an optional argument to utility functions. Differential Revision: https://reviews.llvm.org/D32766 llvm-svn: 302612
* [CodeGen] Don't require AA in SDAGISel at -O0.Ahmed Bougacha2017-05-104-27/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | Before r247167, the pass manager builder controlled which AA implementations were used, exporting them all in the AliasAnalysis analysis group. Now, AAResultsWrapperPass always uses BasicAA, but still uses other AA implementations if made available in the pass pipeline. But regardless, SDAGISel is required at O0, and really doesn't need to be doing fancy optimizations based on useful AA results. Don't require AA at CodeGenOpt::None, and only use it otherwise. This does have a functional impact (and one testcase is pessimized because we can't reuse a load). But I think that's desirable no matter what. Note that this alone doesn't result in less DT computations: TwoAddress was previously able to reuse the DT we computed for SDAG. That will be fixed separately. Differential Revision: https://reviews.llvm.org/D32766 llvm-svn: 302611
* [CodeGen] Compute DT/LI lazily in SafeStackLegacyPass. NFC.Ahmed Bougacha2017-05-101-2/+15
| | | | | | | | | | | | | We currently require SCEV, which requires DT/LI. Those are expensive to compute, but the pass only runs for functions that have the safestack attribute. Compute DT/LI to build SCEV lazily, only when the pass is actually going to transform the function. Differential Revision: https://reviews.llvm.org/D31302 llvm-svn: 302610
* [CodeGen] Split SafeStack into a LegacyPass and a utility. NFC.Ahmed Bougacha2017-05-102-72/+89
| | | | | | | | | This lets the pass focus on gathering the required analyzes, and the utility class focus on the transformation. Differential Revision: https://reviews.llvm.org/D31303 llvm-svn: 302609
* DAGCombine: Combine shuffles of splat-shufflesZvi Rackover2017-05-091-0/+54
| | | | | | | | | | | | | | Summary: Reapply r299047, but this time handle correctly splat-masks with undef elements. Reviewers: spatel, RKSimon, eli.friedman, andreadb Reviewed By: spatel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D31961 llvm-svn: 302583
* [codeview] Check for a DIExpression offset for local variablesReid Kleckner2017-05-091-1/+9
| | | | | | | | Fixes inalloca parameters, which previously all pointed to the same offset. Extend the test to use llvm-readobj so that we can test the offset in a readable way. llvm-svn: 302578
* Suppress all uses of LLVM_END_WITH_NULL. NFC.Serge Guelton2017-05-091-2/+2
| | | | | | | | | Use variadic templates instead of relying on <cstdarg> + sentinel. This enforces better type checking and makes code more readable. Differential Revision: https://reviews.llvm.org/D32541 llvm-svn: 302571
* [RegScavenger] Rangify a loop, NFCKrzysztof Parzyszek2017-05-091-4/+3
| | | | llvm-svn: 302554
* Re-land "Use the frame index side table for byval and inalloca arguments"Reid Kleckner2017-05-094-41/+68
| | | | | | This re-lands r302483. It was not the cause of PR32977. llvm-svn: 302544
* Re-land "Don't add DBG_VALUE instructions for static allocas in dbg.declare"Reid Kleckner2017-05-091-14/+0
| | | | | | This re-lands commit r302461. It was not the cause of PR32977. llvm-svn: 302543
* [Atomic] Remove IsStore/IsLoad in the interface, and pass the instruction ↵Tim Shen2017-05-091-22/+9
| | | | | | | | | | | | | | | | | instead. NFC. Now both emitLeadingFence and emitTrailingFence take the instruction itself, instead of taking IsLoad/IsStore pairs. Instruction::mayReadFromMemory and Instrucion::mayWriteToMemory are used for determining those two booleans. The instruction argument is also useful for later D32763, in emitTrailingFence. For emitLeadingFence, it seems to have cleaner interface with the proposed change. Differential Revision: https://reviews.llvm.org/D32762 llvm-svn: 302539
* Add extra operand to CALLSEQ_START to keep frame part set up previouslySerge Pavlov2017-05-094-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using arguments with attribute inalloca creates problems for verification of machine representation. This attribute instructs the backend that the argument is prepared in stack prior to CALLSEQ_START..CALLSEQ_END sequence (see http://llvm.org/docs/InAlloca.htm for details). Frame size stored in CALLSEQ_START in this case does not count the size of this argument. However CALLSEQ_END still keeps total frame size, as caller can be responsible for cleanup of entire frame. So CALLSEQ_START and CALLSEQ_END keep different frame size and the difference is treated by MachineVerifier as stack error. Currently there is no way to distinguish this case from actual errors. This patch adds additional argument to CALLSEQ_START and its target-specific counterparts to keep size of stack that is set up prior to the call frame sequence. This argument allows MachineVerifier to calculate actual frame size associated with frame setup instruction and correctly process the case of inalloca arguments. The changes made by the patch are: - Frame setup instructions get the second mandatory argument. It affects all targets that use frame pseudo instructions and touched many files although the changes are uniform. - Access to frame properties are implemented using special instructions rather than calls getOperand(N).getImm(). For X86 and ARM such replacement was made previously. - Changes that reflect appearance of additional argument of frame setup instruction. These involve proper instruction initialization and methods that access instruction arguments. - MachineVerifier retrieves frame size using method, which reports sum of frame parts initialized inside frame instruction pair and outside it. The patch implements approach proposed by Quentin Colombet in https://bugs.llvm.org/show_bug.cgi?id=27481#c1. It fixes 9 tests failed with machine verifier enabled and listed in PR27481. Differential Revision: https://reviews.llvm.org/D32394 llvm-svn: 302527
* Introduce experimental generic intrinsics for horizontal vector reductions.Amara Emerson2017-05-096-1/+163
| | | | | | | | | | | | | | - This change allows targets to opt-in to using them instead of the log2 shufflevector algorithm. - The SLP and Loop vectorizers have the common code to do shuffle reductions factored out into LoopUtils, and now have a unified interface for generating reductions regardless of the preference of the target. LoopUtils now uses TTI to determine what kind of reductions the target wants to handle. - For CodeGen, basic legalization support is added. Differential Revision: https://reviews.llvm.org/D30086 llvm-svn: 302514
* Revert "Don't add DBG_VALUE instructions for static allocas in dbg.declare"Reid Kleckner2017-05-091-0/+14
| | | | | | | | | | This reverts commit r302461. It appears to be causing failures compiling gtest with debug info on the Linux sanitizer bot. I was unable to reproduce the failure locally, however. llvm-svn: 302504
* Fix code section prefix for proper layoutTeresa Johnson2017-05-091-1/+1
| | | | | | | | | | | | | | | | | | Summary: r284533 added hot and cold section prefixes based on profile information, to enable grouping of hot/cold functions at link time. However, it used "cold" as the prefix for cold sections, but gold only recognizes "unlikely" (which is used by gcc for cold sections). Therefore, cold sections were not properly being grouped. Switch to using "unlikely" Reviewers: danielcdh, davidxl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32983 llvm-svn: 302502
* Revert "Use the frame index side table for byval and inalloca arguments"Reid Kleckner2017-05-094-68/+41
| | | | | | This reverts r302483 and it's follow up fix. llvm-svn: 302493
* Ignore !associated metadata with null argument.Evgeniy Stepanov2017-05-081-1/+5
| | | | | | | Fixes PR32577 (comment 10). Such metadata may legitimately appear in LTO. llvm-svn: 302485
* Use the frame index side table for byval and inalloca argumentsReid Kleckner2017-05-084-41/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: For inalloca functions, this is a very common code pattern: %argpack = type <{ i32, i32, i32 }> define void @f(%argpack* inalloca %args) { entry: %a = getelementptr inbounds %argpack, %argpack* %args, i32 0, i32 0 %b = getelementptr inbounds %argpack, %argpack* %args, i32 0, i32 1 %c = getelementptr inbounds %argpack, %argpack* %args, i32 0, i32 2 tail call void @llvm.dbg.declare(metadata i32* %a, ... "a") tail call void @llvm.dbg.declare(metadata i32* %c, ... "b") tail call void @llvm.dbg.declare(metadata i32* %b, ... "c") Even though these GEPs can be simplified to a constant offset from EBP or RSP, we don't do that at -O0, and each GEP is computed into a register. Registers used to compute argument addresses are typically spilled and clobbered very quickly after the initial computation, so live debug variable tracking loses information very quickly if we use DBG_VALUE instructions. This change moves processing of dbg.declare between argument lowering and basic block isel, so that we can ask if an argument has a frame index or not. If the argument lives in a register as is the case for byval arguments on some targets, then we don't put it in the side table and during ISel we emit DBG_VALUE instructions. Reviewers: aprantl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32980 llvm-svn: 302483
* Don't add DBG_VALUE instructions for static allocas in dbg.declareReid Kleckner2017-05-081-14/+0
| | | | | | | | | | | | | | | | | | | | | | | Summary: An llvm.dbg.declare of a static alloca is always added to the MachineFunction dbg variable map, so these values are entirely redundant. They survive all the way through codegen to be ignored by DWARF emission. Effectively revert r113967 Two bugpoint-reduced test cases from 2012 broke as a result of this change. Despite my best efforts, I haven't been able to rewrite the test case using dbg.value. I'm not too concerned about the lost coverage because these were reduced from the test-suite, which we still run. Reviewers: aprantl, dblaikie Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32920 llvm-svn: 302461
* [XRay] Custom event logging intrinsicDean Michael Berris2017-05-082-0/+52
| | | | | | | | | | | | | | | | | | | | This patch introduces an LLVM intrinsic and a target opcode for custom event logging in XRay. Initially, its use case will be to allow users of XRay to log some type of string ("poor man's printf"). The target opcode compiles to a noop sled large enough to enable calling through to a runtime-determined relative function call. At runtime, when X-Ray is enabled, the sled is replaced by compiler-rt with a trampoline to the logic for creating the custom log entries. Future patches will implement the compiler-rt parts and clang-side support for emitting the IR corresponding to this intrinsic. Reviewers: timshen, dberris Subscribers: igorb, pelikan, rSerge, timshen, echristo, dberris, llvm-commits Differential Revision: https://reviews.llvm.org/D27503 llvm-svn: 302405
* [DAGCombiner] If ISD::ABS is legal/custom, use it directly instead of ↵Simon Pilgrim2017-05-061-0/+3
| | | | | | | | | | canonicalizing first. Remove an extra canonicalization step if ISD::ABS is going to be used anyway. Updated x86 abs combine to check that we are lowering from both canonicalizations. llvm-svn: 302337
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