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* Enable the simplification of truncating-store after fixing the usage ofNadav Rotem2011-06-152-4/+5
| | | | | | | | GetDemandBits (which must operate on the vector element type). Fix the a usage of getZeroExtendInReg which must also be done on scalar types. llvm-svn: 133052
* When pattern matching during instruction selection make sure shl x,1 is notChad Rosier2011-06-141-0/+3
| | | | | | | | converted to add x,x if x is a undef. add undef, undef does not guarantee that the resulting low order bit is zero. Fixes <rdar://problem/9453156> and <rdar://problem/9487392>. llvm-svn: 133022
* Revert r133004 ; it's breaking nightly tests.Eli Friedman2011-06-141-4/+21
| | | | llvm-svn: 133007
* Partial revert of 132882.Rafael Espindola2011-06-141-21/+4
| | | | | | | | | | | | | | | | Dan noted that this would work on the case shown on the commit message. I think the case that was failing was a bb ending with a redundant conditional jump: ... jne foo foo: ... I was unable to find any such case in the tests or in a debug build of clang, so I will revert this part of the patch and watch the bots. llvm-svn: 133004
* Add 132986 back, but avoid non-determinism if a bb address gets reused.Rafael Espindola2011-06-142-5/+26
| | | | llvm-svn: 132995
* revert 132986 to see if the bots go green.Rafael Espindola2011-06-142-23/+5
| | | | llvm-svn: 132988
* Add a testcase for checking the integer-promotion of many different vectorNadav Rotem2011-06-142-2/+171
| | | | | | | | | | | | | types (with power of two types such as 8,16,32 .. 512). Fix a bug in the integer promotion of bitcast nodes. Enable integer expanding only if the target of the conversion is an integer (when the type action is scalarize). Add handling to the legalization of vector load/store in cases where the saved vector is integer-promoted. llvm-svn: 132985
* Disable trunc-store simplification on vectors.Nadav Rotem2011-06-141-1/+1
| | | | llvm-svn: 132984
* Implement Jakob's suggestion on how to detect fall thought without callingRafael Espindola2011-06-141-12/+19
| | | | | | AnalyzeBranch. llvm-svn: 132981
* Add one more argument to the prefetch intrinsic to indicate whether it's a dataBruno Cardoso Lopes2011-06-141-2/+3
| | | | | | | or instruction cache access. Update the targets to match it and also teach autoupgrade. llvm-svn: 132976
* Make the threshold used by branch folding softer. Before we would get aRafael Espindola2011-06-142-5/+23
| | | | | | | sharp all or nothing transition when one extra predecessor was added. Now we still test first ones for merging. llvm-svn: 132974
* Fix a bug in FindMemType. When widening vector loads, use a wider memory typeNadav Rotem2011-06-131-0/+2
| | | | | | | only if the number of packed elements is a power of two. Bug found in Duncan's testcase. llvm-svn: 132923
* Be less aggressive about hinting in RAFast.Jakob Stoklund Olesen2011-06-131-7/+5
| | | | | | | | | | In particular, don't spill dirty registers only to satisfy a hint. It is not worth it. The attached test case provides an example where the fast allocator would spill a register when other registers are available. llvm-svn: 132900
* Include callee-saved registers in debug output.Jakob Stoklund Olesen2011-06-131-1/+1
| | | | llvm-svn: 132899
* Fix invalid uses of Twine. Hopefully this fixes the problem that Takumi isRafael Espindola2011-06-131-7/+7
| | | | | | having. llvm-svn: 132898
* Fix a bug in the calculation of the vectorTypeBreakdown into registers. OddNadav Rotem2011-06-121-5/+17
| | | | | | types such as i33 were rounded to i32. Originated from Duncan's testcase. llvm-svn: 132893
* Improve the generated code by getCopyFromPartsVector for promoted integer types.Nadav Rotem2011-06-121-21/+20
| | | | | | | | | Instead of scalarizing, and doing an element-by-element truncat, use vector truncate. Add support for scalarization of vectors: i8 -> <1 x i1> (from Duncan's testcase). llvm-svn: 132892
* Really fix the fall-through logic.Rafael Espindola2011-06-121-0/+3
| | | | | | Add a triple to the tests. llvm-svn: 132885
* Fix silly bug I introduce in the previous commit. Fixes debug builds.Rafael Espindola2011-06-121-3/+3
| | | | llvm-svn: 132883
* AnalyzeBranch doesn't change which successors a bb has, just the orderRafael Espindola2011-06-121-4/+11
| | | | | | | | | | | | | | | | | | we try to branch to them. Before we were creating successor lists with duplicated entries. Fixing that found a bug in isBlockOnlyReachableByFallthrough that would causes it to return the wrong answer for ----------- ... jne foo jmp bar foo: ---------- llvm-svn: 132882
* Revert r132871.Chad Rosier2011-06-111-1/+1
| | | | llvm-svn: 132872
* Typo.Chad Rosier2011-06-111-1/+1
| | | | llvm-svn: 132871
* 80-col cleanups.Eric Christopher2011-06-101-6/+5
| | | | llvm-svn: 132863
* Removed tabs. Also fixed my editor...Rafael Espindola2011-06-101-3/+2
| | | | llvm-svn: 132857
* Rename the ParmContext enum values to make a bit more sense and add a smallCameron Zwarich2011-06-101-1/+1
| | | | | | comment on their meaning. llvm-svn: 132854
* Remove tabs.Cameron Zwarich2011-06-101-2/+2
| | | | llvm-svn: 132853
* Remove a pointless const_cast.Cameron Zwarich2011-06-101-1/+1
| | | | llvm-svn: 132852
* Remove duplicated test.Rafael Espindola2011-06-101-4/+3
| | | | | | Thanks Bob Wilson for noticing it! llvm-svn: 132851
* Ensure that EmitGlobalVariable is correctly differentiating between declarationsChad Rosier2011-06-101-1/+1
| | | | | | | | and definitions when emitting global variables. This was causing global declarations to be emitted as if they were definitions. Fixes <rdar://problem/9429892>. llvm-svn: 132825
* Make the optional verification step more strict.Rafael Espindola2011-06-091-1/+8
| | | | llvm-svn: 132822
* Avoid a gcc warning about multiline comments.Rafael Espindola2011-06-091-6/+6
| | | | llvm-svn: 132821
* On last fix to the early tail duplication.Rafael Espindola2011-06-091-4/+60
| | | | | | | | With this I am able to bootstrap clang with early tail duplication enabled for any small bb and setting tail-dup-size to a relatively large value(8) to stress this code. llvm-svn: 132816
* Also consider phi nodes when deciding if a register is live out.Rafael Espindola2011-06-091-10/+34
| | | | llvm-svn: 132814
* Change this DAGCombine to build AND of SHR instead of SHR of AND; this ↵Eli Friedman2011-06-091-15/+16
| | | | | | | | matches the ordering we prefer in instcombine. Part of rdar://9562809. The potential DAGCombine which enforces this more generally messes up some other very fragile patterns, so I'm leaving that alone, at least for now. llvm-svn: 132809
* AnalyzeBranch modifies the bb, but we don't want to modify a bb withRafael Espindola2011-06-091-7/+6
| | | | | | eh edges. Swap the order of the checks to avoid it. llvm-svn: 132806
* A PHI in this basic block is a use in another basic block.Rafael Espindola2011-06-091-1/+1
| | | | llvm-svn: 132805
* Refactor some checks into shouldTailDuplicate. Update comments.Rafael Espindola2011-06-091-18/+29
| | | | | | No functionality change. llvm-svn: 132798
* Recommit r132764 since it didn't cause the windows buildbot failures.Eric Christopher2011-06-091-0/+2
| | | | llvm-svn: 132776
* Temporarily revert 132764 to see if it fixes the Windows buildbot.Eric Christopher2011-06-091-2/+0
| | | | llvm-svn: 132771
* If the alignment of the byval argument is greater than the alignmentEric Christopher2011-06-091-0/+2
| | | | | | | | | of the frame then increase the maximum alignment of the frame to match. Fixes PR6965 llvm-svn: 132764
* Add a parameter to CCState so that it can access the MachineFunction.Eric Christopher2011-06-083-14/+19
| | | | | | | | No functional change. Part of PR6965 llvm-svn: 132763
* Remove a temporary test case probe in CheckForLiveRegDef.Andrew Trick2011-06-081-1/+0
| | | | llvm-svn: 132751
* Fix count.Rafael Espindola2011-06-081-1/+1
| | | | llvm-svn: 132749
* Count how many phis we are creating.Rafael Espindola2011-06-081-0/+2
| | | | llvm-svn: 132748
* Fix an issue where the two-address conversion pass incorrectly rewrites untiedCameron Zwarich2011-06-071-9/+16
| | | | | | operands to an early clobber register. This fixes <rdar://problem/9566076>. llvm-svn: 132738
* Fix a silly error I introduce in r131951.Rafael Espindola2011-06-071-4/+1
| | | | | | Fixes PR10095. llvm-svn: 132735
* Fix a merge bug in preRAsched for handling physreg aliases.Andrew Trick2011-06-071-4/+6
| | | | | | | I've been sitting on this long enough trying to find a test case. I think the fix should go in now, but I'll keep working on the test case. llvm-svn: 132701
* Simplify local live range splitting's safeguard to fix PR10070.Jakob Stoklund Olesen2011-06-061-87/+57
| | | | | | | | | | | | | | | When local live range splitting creates a live range with the same number of instructions as the old range, mark it as RS_Local. When such a range is seen again, require that it be split in a way that reduces the number of instructions. That guarantees we are making progress while still being able to perform 3 -> 2+3 splits as required by PR10070. This also means that the PrevSlot map is no longer needed. This was also used to estimate new spill weights, but that is no longer necessary after slotIndexes::insertMachineInstrInMaps() got the extra Late insertion argument. llvm-svn: 132697
* Get allocation orders from RegisterClassInfo when possible.Jakob Stoklund Olesen2011-06-062-23/+52
| | | | | | | | | | | | Only target-dependent hints require callbacks. The RCI allocation order has CSR aliases last according to their order of appearance in the getCalleeSavedRegs list. This can depend on the calling convention. This way, AllocationOrder::next doesn't have to check for reserved registers, and CSRs are always allocated last, even with weird calling conventions. llvm-svn: 132690
* Add methods to support the integer-promotion of vector types. Methods toNadav Rotem2011-06-063-0/+192
| | | | | | legalize SDNodes such as BUILD_VECTOR, EXTRACT_VECTOR_ELT, etc. llvm-svn: 132689
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