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* Add a DIELocList class to handle pointers into the location list.Eric Christopher2014-03-056-14/+81
| | | | | | | | This enables us to figure out where in the debug_loc section our locations are so that we can eventually hash them. It also helps remove some special case code in emission. No functional change. llvm-svn: 203018
* Always print the implicit .text at the start of an asm file.Rafael Espindola2014-03-051-1/+1
| | | | | | | | | | | | | | | | | Before llvm-mc would print it, but llc was assuming that it would produce another section changing directive before one was needed. That assumption is false with inline asm. Fixes PR19049. Another option would be to always create the section, but in the asm printer avoid printing sections changes during initialization. That would work, but * We do use the fact that llvm-mc prints it in testing. The tests can be changed if needed. * A quick poll on IRC suggest that most developers prefer the implicit .text to be printed. llvm-svn: 203001
* [Layering] Move DebugLoc.h into the IR library. The implementationChandler Carruth2014-03-054-4/+4
| | | | | | | | | | | already lived there and it is where it belongs -- this is the in-memory debug location representation. This is just cleanup -- Modules can actually cope with this, but that doesn't make it right. After chatting with folks that have out-of-tree stuff, going ahead and moving the rest of the headers seems preferable. llvm-svn: 202960
* [C++11] Replace OwningPtr::take() with OwningPtr::release().Ahmed Charles2014-03-052-5/+5
| | | | llvm-svn: 202957
* Make stackmap machineinstrs clobber the scratch regs too.Andrew Trick2014-03-051-4/+10
| | | | | | | | | | | | | Patchpoints already did this. Doing it for stackmaps is a convenience for the runtime in the event that it needs to scratch register to patch or perform a runtime call thunk. Unlike patchpoints, we just assume the AnyRegCC calling convention. This is the only language and target independent calling convention specific to stackmaps so makes sense. Although the calling convention is not currently used to select the scratch registers. llvm-svn: 202943
* Fix unused variable in FunctionLoweringInfo.cppHans Wennborg2014-03-051-1/+1
| | | | llvm-svn: 202932
* Check for dynamic allocas and inline asm that clobbers sp before buildingHans Wennborg2014-03-053-9/+45
| | | | | | | | | | | | | | | | | | | selection dag (PR19012) In X86SelectionDagInfo::EmitTargetCodeForMemcpy we check with MachineFrameInfo to make sure that ESI isn't used as a base pointer register before we choose to emit rep movs (which clobbers esi). The problem is that MachineFrameInfo wouldn't know about dynamic allocas or inline asm that clobbers the stack pointer until SelectionDAGBuilder has encountered them. This patch fixes the problem by checking for such things when building the FunctionLoweringInfo. Differential Revision: http://llvm-reviews.chandlerc.com/D2954 llvm-svn: 202930
* Make the DIEValue constructor even more explicit.Eric Christopher2014-03-051-6/+6
| | | | llvm-svn: 202926
* Use a bool for whether or not an abbreviation has children rather thanEric Christopher2014-03-053-16/+17
| | | | | | | using a full uint16_t with the flag value... which happens to be 0 or 1. Update the class for bool values and rename functions slightly. llvm-svn: 202921
* Use dwarf::Attribute instead of a bare uint16_t.Eric Christopher2014-03-052-2/+2
| | | | llvm-svn: 202920
* Expand slightly on comment.Eric Christopher2014-03-051-1/+2
| | | | llvm-svn: 202919
* Unindent namespace.Eric Christopher2014-03-051-414/+436
| | | | llvm-svn: 202918
* [DAGCombiner] Factor out distributeTruncateThroughAndAdam Nemet2014-03-041-47/+42
| | | | | | | | | Currently this code is duplicated across visitSHL, visitSRA and visitSRL. The plan is to add rotates as clients to this new function. There is no functional change intended here. llvm-svn: 202908
* [Modules] Move the LeakDetector header into the IR library where theChandler Carruth2014-03-041-1/+1
| | | | | | | | | | | source file had already been moved. Also move the unittest into the IR unittest library. This may seem an odd thing to put in the IR library but we only really use this with instructions and it needs the LLVM context to work, so it is intrinsically tied to the IR library. llvm-svn: 202842
* [Modules] Move CFG.h to the IR library as it defines graph traits overChandler Carruth2014-03-041-1/+1
| | | | | | IR types. llvm-svn: 202827
* [Modules] Move ValueMap to the IR library. While this class does notChandler Carruth2014-03-041-1/+1
| | | | | | | | | | | | directly care about the Value class (it is templated so that the key can be any arbitrary Value subclass), it is in fact concretely tied to the Value class through the ValueHandle's CallbackVH interface which relies on the key type being some Value subclass to establish the value handle chain. Ironically, the unittest is already in the right library. llvm-svn: 202824
* [Modules] Move ValueHandle into the IR library where Value itself lives.Chandler Carruth2014-03-042-2/+2
| | | | | | | | | | | Move the test for this class into the IR unittests as well. This uncovers that ValueMap too is in the IR library. Ironically, the unittest for ValueMap is useless in the Support library (honestly, so was the ValueHandle test) and so it already lives in the IR unittests. Mmmm, tasty layering. llvm-svn: 202821
* [Modules] Move the LLVM IR pattern match header into the IR library, itChandler Carruth2014-03-041-1/+1
| | | | | | obviously is coupled to the IR. llvm-svn: 202818
* [Modules] Move CallSite into the IR library where it belogs. It isChandler Carruth2014-03-045-5/+5
| | | | | | | abstracting between a CallInst and an InvokeInst, both of which are IR concepts. llvm-svn: 202816
* [Modules] Move GetElementPtrTypeIterator into the IR library. As itsChandler Carruth2014-03-041-1/+1
| | | | | | | | | name might indicate, it is an iterator over the types in an instruction in the IR.... You see where this is going. Another step of modularizing the support library. llvm-svn: 202815
* [cleanup] Re-sort all the includes with utils/sort_includes.py.Chandler Carruth2014-03-047-8/+8
| | | | llvm-svn: 202811
* [C++11] Use std::tie to simplify compare operators.Benjamin Kramer2014-03-031-3/+2
| | | | | | No functionality change. llvm-svn: 202751
* Add DWARF discriminator support to DILexicalBlocks.Diego Novillo2014-03-031-1/+4
| | | | | | This adds support for emitting discriminators from DILexicalBlocks. llvm-svn: 202736
* Re-apply r202551, which introduced new PBQP solver.Lang Hames2014-03-031-38/+38
| | | | llvm-svn: 202735
* [C++11] Replace llvm::tie with std::tie.Benjamin Kramer2014-03-0213-58/+58
| | | | | | The old implementation is no longer needed in C++11. llvm-svn: 202644
* [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer2014-03-0248-179/+177
| | | | | | Remove the old functions. llvm-svn: 202636
* Switch all uses of LLVM_OVERRIDE to just use 'override' directly.Craig Topper2014-03-023-50/+50
| | | | llvm-svn: 202621
* Switch all uses of LLVM_FINAL to just use 'final', and remove the macro.Craig Topper2014-03-021-1/+1
| | | | llvm-svn: 202618
* [C++11] Switch all uses of the llvm_move macro to use std::moveChandler Carruth2014-03-021-3/+3
| | | | | | directly, and remove the macro. llvm-svn: 202612
* [C++11] Expand and eliminate the LLVM_ENUM_INT_TYPE() macroAlp Toker2014-03-022-2/+2
| | | | llvm-svn: 202607
* Make helper function static.Benjamin Kramer2014-03-011-2/+1
| | | | llvm-svn: 202596
* Now that we have C++11, turn simple functors into lambdas and remove a ton ↵Benjamin Kramer2014-03-014-65/+26
| | | | | | | | of boilerplate. No intended functionality change. llvm-svn: 202588
* SpillPlacement: fix a bug in iterate.Manman Ren2014-02-281-2/+4
| | | | | | | | | | | Inside iterate, we scan backwards then scan forwards in a loop. When iteration is not zero, the last node was just updated so we can skip it. But when iteration is zero, we can't skip the last node. For the testing case, fixing this will save a spill and move register copies from hot path to cold path. llvm-svn: 202557
* Jumped the gun with r202551 and broke some bots that weren't yet C++11ified.Lang Hames2014-02-281-38/+38
| | | | | | Reverting until the C++11 switch is complete. llvm-svn: 202554
* New PBQP solver, and updates to the PBQP graph.Lang Hames2014-02-281-38/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous PBQP solver was very robust but consumed a lot of memory, performed a lot of redundant computation, and contained some unnecessarily tight coupling that prevented experimentation with novel solution techniques. This new solver is an attempt to address these shortcomings. Important/interesting changes: 1) The domain-independent PBQP solver class, HeuristicSolverImpl, is gone. It is replaced by a register allocation specific solver, PBQP::RegAlloc::Solver (see RegAllocSolver.h). The optimal reduction rules and the backpropagation algorithm have been extracted into stand-alone functions (see ReductionRules.h), which can be used to build domain specific PBQP solvers. This provides many more opportunities for domain-specific knowledge to inform the PBQP solvers' decisions. In theory this should allow us to generate better solutions. In practice, we can at least test out ideas now. As a side benefit, I believe the new solver is more readable than the old one. 2) The solver type is now a template parameter of the PBQP graph. This allows the graph to notify the solver of any modifications made (e.g. by domain independent rules) without the overhead of a virtual call. It also allows the solver to supply policy information to the graph (see below). 3) Significantly reduced memory overhead. Memory management policy is now an explicit property of the PBQP graph (via the CostAllocator typedef on the graph's solver template argument). Because PBQP graphs for register allocation tend to contain many redundant instances of single values (E.g. the value representing an interference constraint between GPRs), the new RASolver class uses a uniquing scheme. This massively reduces memory consumption for large register allocation problems. For example, looking at the largest interference graph in each of the SPEC2006 benchmarks (the largest graph will always set the memory consumption high-water mark for PBQP), the average memory reduction for the PBQP costs was 400x. That's times, not percent. The highest was 1400x. Yikes. So - this is fixed. "PBQP: No longer feasting upon every last byte of your RAM". Minor details: - Fully C++11'd. Never copy-construct another vector/matrix! - Cute tricks with cost metadata: Metadata that is derived solely from cost matrices/vectors is attached directly to the cost instances themselves. That way if you unique the costs you never have to recompute the metadata. 400x less memory means 400x less cost metadata (re)computation. Special thanks to Arnaud de Grandmaison, who has been the source of much encouragement, and of many very useful test cases. This new solver forms the basis for future work, of which there's plenty to do. I will be adding TODO notes shortly. - Lang. llvm-svn: 202551
* Fix visitTRUNCATE for legal i1 valuesHal Finkel2014-02-281-1/+1
| | | | | | | | | | | This extract-and-trunc vector optimization cannot work for i1 values as currently implemented, and so I'm disabling this for now for i1 values. In the future, this can be fixed properly. Soon I'll commit support for i1 CR bit tracking in the PowerPC backend, and this will be covered by one of the existing regression tests. llvm-svn: 202449
* Provide a target override for the latest regalloc heuristic.Andrew Trick2014-02-271-1/+1
| | | | | | | This is a temporary workaround for native arm linux builds: PR18996: Changing regalloc order breaks "lencod" on native arm linux builds. llvm-svn: 202433
* Revert r201751 and solve the const problem a different way - byEric Christopher2014-02-273-28/+16
| | | | | | making the cache mutable. llvm-svn: 202417
* Debug info: Remove ARMAsmPrinter::EmitDwarfRegOp(). AsmPrinter can nowAdrian Prantl2014-02-271-34/+83
| | | | | | | | | | scan the register file for sub- and super-registers. No functionality change intended. (Tests are updated because the comments in the assembler output are different.) llvm-svn: 202416
* Don't emit anything into the debug_ranges section if we aren't emittingEric Christopher2014-02-271-1/+1
| | | | | | | | | | any ranges - this includes CU ranges where we were previously emitting an end list marker even if we didn't have a list. Testcase includes a test for line table only code emission as the problem was noticed while writing this test. llvm-svn: 202357
* If we're only emitting line tables for a particular CU then don't addEric Christopher2014-02-271-1/+6
| | | | | | | | | | | any ranges to the list of ranges for the CU as we don't want to emit them anyway. This ensures that we will still emit ranges if we have a compile unit compiled with only line tables and one compiled with full debug info requested (we'll emit for the one with full debug info). Update testcase metadata accordingly to continue emitting ranges. llvm-svn: 202333
* Fix a type error that crept into r202313.Adrian Prantl2014-02-261-1/+1
| | | | llvm-svn: 202317
* Remove unnecessary llvm:: qualification.Eric Christopher2014-02-261-1/+1
| | | | llvm-svn: 202316
* Debug info: Refactor AsmPrinter::EmitDwarfRegOp to make the control flowAdrian Prantl2014-02-261-60/+90
| | | | | | more obvious. llvm-svn: 202313
* Add a limit to the heuristic that register allocates instructions in local ↵Andrew Trick2014-02-261-2/+8
| | | | | | | | | | | | order. This handles pathological cases in which we see 2x increase in spill code for large blocks (~50k instructions). I don't have a unit test for this behavior. Fixes rdar://16072279. llvm-svn: 202304
* Fix the aggressive anti-dep breaker's subregister definition handlingHal Finkel2014-02-261-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The aggressive anti-dependency breaker scans instructions, bottom-up, within the scheduling region in order to find opportunities where register renaming can be used to break anti-dependencies. Unfortunately, the aggressive anti-dep breaker was treating a register definition as defining all of that register's aliases (including super registers). This behavior is incorrect when the super register is live and there are other definitions of subregisters of the super register. For example, given the following sequence: %CR2EQ<def> = CROR %CR3UN, %CR3UN<kill> %CR2GT<def> = IMPLICIT_DEF %X4<def> = MFOCRF8 %CR2 the analysis of the first subregister definition would work as expected: Anti: %CR2GT<def> = IMPLICIT_DEF Def Groups: CR2GT=g194->g0(via CR2) Antidep reg: CR2GT (zero group) Use Groups: but the analysis of the second one would not: Anti: %CR2EQ<def> = CROR %CR3UN, %CR3UN<kill> Def Groups: CR2EQ=g195 Antidep reg: CR2EQ Rename Candidates for Group g195: ... because, when processing the %CR2GT<def>, we'd mark all super registers of %CR2GT (%CR2 in this case) as defined. As a result, when processing %CR2EQ<def>, %CR2 no longer appears to be live, and %CR2EQ<def>'s group is not %unioned with the %CR2 group. I don't have an in-tree test case for this yet (and even if I did, I don't have a small one). llvm-svn: 202294
* 80-col.Eric Christopher2014-02-261-1/+2
| | | | llvm-svn: 202221
* Formatting fixups.Eric Christopher2014-02-261-2/+2
| | | | llvm-svn: 202220
* DwarfDebug: Avoid emitting an empty debug_aranges section when aranges are ↵David Blaikie2014-02-251-1/+2
| | | | | | disabled llvm-svn: 202201
* Address review comments for r202188.Adrian Prantl2014-02-253-32/+16
| | | | | | | | | This is refactoring / simplifying code, updating comments and enabling the testcase on non-x86 platforms. No functionality change. llvm-svn: 202199
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