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* Expand some code with temporary variables to rid ourselves of the warningReid Spencer2006-04-131-7/+21
| | | | | | about "dereferencing type-punned pointer will break strict-aliasing rules" llvm-svn: 27671
* Promote vector AND, OR, and XOREvan Cheng2006-04-121-0/+27
| | | | llvm-svn: 27632
* Vector type promotion for ISD::LOAD and ISD::SELECTEvan Cheng2006-04-121-9/+23
| | | | llvm-svn: 27606
* Implement support for the formal_arguments node. To get this, targets ↵Chris Lattner2006-04-123-3/+128
| | | | | | shouldcustom legalize it and remove their XXXTargetLowering::LowerArguments overload llvm-svn: 27604
* Don't memoize vloads in the load map! Don't memoize them anywhere here, letChris Lattner2006-04-121-2/+0
| | | | | | getNode do it. This fixes CodeGen/Generic/2006-04-11-vecload.ll llvm-svn: 27602
* Only get Tmp2 for cases where number of operands is > 1. Fixed return void.Evan Cheng2006-04-111-1/+1
| | | | llvm-svn: 27586
* add some todosChris Lattner2006-04-111-0/+8
| | | | llvm-svn: 27580
* Add basic support for legalizing returns of vectorsChris Lattner2006-04-111-9/+36
| | | | llvm-svn: 27578
* Use existing information.Jim Laskey2006-04-101-3/+14
| | | | llvm-svn: 27574
* Missing breakEvan Cheng2006-04-101-0/+1
| | | | llvm-svn: 27559
* Add code generator support for VSELECTChris Lattner2006-04-083-10/+22
| | | | llvm-svn: 27542
* Canonicalize vvector_shuffle(x,x) -> vvector_shuffle(x,undef) to enable patternsChris Lattner2006-04-082-2/+50
| | | | | | to match again :) llvm-svn: 27533
* Codegen shufflevector as VVECTOR_SHUFFLEChris Lattner2006-04-082-2/+25
| | | | llvm-svn: 27529
* add a sanity check: LegalizeOp should return a value that is the same typeChris Lattner2006-04-081-0/+3
| | | | | | as its input. llvm-svn: 27528
* INSERT_VECTOR_ELT lowering bug:Evan Cheng2006-04-081-14/+11
| | | | | | | | | store vector to $esp store element to $esp + sizeof(VT) * index load vector from $esp The bug is VT is the type of the vector element, not the type of the vector! llvm-svn: 27517
* Stub out shufflevectorChris Lattner2006-04-081-0/+1
| | | | llvm-svn: 27514
* Remove section change in function end, preventing override of function's realJim Laskey2006-04-081-1/+0
| | | | | | section. llvm-svn: 27503
* Make sure that debug labels are defined within the same section and after theJim Laskey2006-04-071-8/+5
| | | | | | entry point of a function. llvm-svn: 27494
* Foundation for call frame information.Jim Laskey2006-04-073-43/+153
| | | | llvm-svn: 27491
* 1. If both vector operands of a vector_shuffle are undef, turn it into an undef.Evan Cheng2006-04-061-3/+6
| | | | | | 2. A shuffle mask element can also be an undef. llvm-svn: 27472
* Make a vector live across blocks have the correct Vec type. This fixesChris Lattner2006-04-051-1/+9
| | | | | | CodeGen/X86/2006-04-04-CrossBlockCrash.ll llvm-svn: 27436
* Exapnd a VECTOR_SHUFFLE to a BUILD_VECTOR if target asks for it to be expandedEvan Cheng2006-04-051-2/+30
| | | | | | or custom lowering fails. llvm-svn: 27432
* Do not create ZEXTLOAD's unless we are before legalize or the operation isChris Lattner2006-04-041-1/+2
| | | | | | legal. llvm-svn: 27402
* * Add supprot for SCALAR_TO_VECTOR operations where the input needs to beChris Lattner2006-04-041-21/+102
| | | | | | | | | | promoted/expanded (e.g. SCALAR_TO_VECTOR from i8/i16 on PPC). * Add support for targets to request that VECTOR_SHUFFLE nodes be promoted to a canonical type, for example, we only want v16i8 shuffles on PPC. * Move isShuffleLegal out of TLI into Legalize. * Teach isShuffleLegal to allow shuffles that need to be promoted. llvm-svn: 27399
* Constant fold bitconvert(undef)Chris Lattner2006-04-041-0/+2
| | | | llvm-svn: 27391
* The stack alignment is now computed dynamically, just verify it is correct.Chris Lattner2006-04-031-1/+2
| | | | llvm-svn: 27380
* Remove unused methodChris Lattner2006-04-031-8/+0
| | | | llvm-svn: 27379
* Add a missing check, this fixes UnitTests/Vector/sumarray.cChris Lattner2006-04-031-2/+2
| | | | llvm-svn: 27375
* Add a missing check, which broke a bunch of vector tests.Chris Lattner2006-04-031-3/+6
| | | | llvm-svn: 27374
* back this outAndrew Lenharth2006-04-031-25/+0
| | | | llvm-svn: 27367
* This should be a win of every archAndrew Lenharth2006-04-021-1/+26
| | | | llvm-svn: 27364
* Add a little dag combine to compile this:Chris Lattner2006-04-021-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | int %AreSecondAndThirdElementsBothNegative(<4 x float>* %in) { entry: %tmp1 = load <4 x float>* %in ; <<4 x float>> [#uses=1] %tmp = tail call int %llvm.ppc.altivec.vcmpgefp.p( int 1, <4 x float> < float 0x7FF8000000000000, float 0.000000e+00, float 0.000000e+00, float 0x7FF8000000000000 >, <4 x float> %tmp1 ) ; <int> [#uses=1] %tmp = seteq int %tmp, 0 ; <bool> [#uses=1] %tmp3 = cast bool %tmp to int ; <int> [#uses=1] ret int %tmp3 } into this: _AreSecondAndThirdElementsBothNegative: mfspr r2, 256 oris r4, r2, 49152 mtspr 256, r4 li r4, lo16(LCPI1_0) lis r5, ha16(LCPI1_0) lvx v0, 0, r3 lvx v1, r5, r4 vcmpgefp. v0, v1, v0 mfcr r3, 2 rlwinm r3, r3, 27, 31, 31 mtspr 256, r2 blr instead of this: _AreSecondAndThirdElementsBothNegative: mfspr r2, 256 oris r4, r2, 49152 mtspr 256, r4 li r4, lo16(LCPI1_0) lis r5, ha16(LCPI1_0) lvx v0, 0, r3 lvx v1, r5, r4 vcmpgefp. v0, v1, v0 mfcr r3, 2 rlwinm r3, r3, 27, 31, 31 xori r3, r3, 1 cntlzw r3, r3 srwi r3, r3, 5 mtspr 256, r2 blr llvm-svn: 27356
* Implement promotion for EXTRACT_VECTOR_ELT, allowing v16i8 multiplies to ↵Chris Lattner2006-04-021-16/+27
| | | | | | work with PowerPC. llvm-svn: 27349
* Implement the Expand action for binary vector operations to break the binopChris Lattner2006-04-021-1/+18
| | | | | | | into elements and operate on each piece. This allows generic vector integer multiplies to work on PPC, though the generated code is horrible. llvm-svn: 27347
* Intrinsics that just load from memory can be treated like loads: they don'tChris Lattner2006-04-021-4/+25
| | | | | | | have to serialize against each other. This allows us to schedule lvx's across each other, for example. llvm-svn: 27346
* Constant fold all of the vector binops. This allows us to compile this:Chris Lattner2006-04-021-0/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "vector unsigned char mergeLowHigh = (vector unsigned char) ( 8, 9, 10, 11, 16, 17, 18, 19, 12, 13, 14, 15, 20, 21, 22, 23 ); vector unsigned char mergeHighLow = vec_xor( mergeLowHigh, vec_splat_u8(8));" aka: void %test2(<16 x sbyte>* %P) { store <16 x sbyte> cast (<4 x int> xor (<4 x int> cast (<16 x ubyte> < ubyte 8, ubyte 9, ubyte 10, ubyte 11, ubyte 16, ubyte 17, ubyte 18, ubyte 19, ubyte 12, ubyte 13, ubyte 14, ubyte 15, ubyte 20, ubyte 21, ubyte 22, ubyte 23 > to <4 x int>), <4 x int> cast (<16 x sbyte> < sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8 > to <4 x int>)) to <16 x sbyte>), <16 x sbyte> * %P ret void } into this: _test2: mfspr r2, 256 oris r4, r2, 32768 mtspr 256, r4 li r4, lo16(LCPI2_0) lis r5, ha16(LCPI2_0) lvx v0, r5, r4 stvx v0, 0, r3 mtspr 256, r2 blr instead of this: _test2: mfspr r2, 256 oris r4, r2, 49152 mtspr 256, r4 li r4, lo16(LCPI2_0) lis r5, ha16(LCPI2_0) vspltisb v0, 8 lvx v1, r5, r4 vxor v0, v1, v0 stvx v0, 0, r3 mtspr 256, r2 blr ... which occurs here: http://developer.apple.com/hardware/ve/calcspeed.html llvm-svn: 27343
* Add a new -view-legalize-dags command line optionChris Lattner2006-04-022-3/+13
| | | | llvm-svn: 27342
* Implement constant folding of bit_convert of arbitrary constant ↵Chris Lattner2006-04-021-2/+139
| | | | | | vbuild_vector nodes. llvm-svn: 27341
* These entries already existChris Lattner2006-04-021-4/+0
| | | | llvm-svn: 27340
* Add some missing node namesChris Lattner2006-04-021-0/+9
| | | | llvm-svn: 27339
* Prefer larger register classes over smaller ones when a register occurs inChris Lattner2006-04-021-7/+21
| | | | | | multiple register classes. This fixes PowerPC/2006-04-01-FloatDoubleExtend.ll llvm-svn: 27334
* Delete identity shuffles, implementing ↵Chris Lattner2006-03-311-2/+56
| | | | | | CodeGen/Generic/vector-identity-shuffle.ll llvm-svn: 27317
* Do not endian swap split vector loads. This fixes ↵Chris Lattner2006-03-311-2/+0
| | | | | | | | UnitTests/Vector/sumarray-dbl on PPC. Now all UnitTests/Vector/* tests pass on PPC. llvm-svn: 27299
* Do not endian swap the operands to a store if the operands came from a vector.Chris Lattner2006-03-311-3/+3
| | | | | | This fixes UnitTests/Vector/simple.c with altivec. llvm-svn: 27298
* Remove dead *extloads. This allows us to codegen vector.ll:test_extract_eltChris Lattner2006-03-311-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | to: test_extract_elt: alloc r3 = ar.pfs,0,1,0,0 adds r8 = 12, r32 ;; ldfs f8 = [r8] mov ar.pfs = r3 br.ret.sptk.many rp instead of: test_extract_elt: alloc r3 = ar.pfs,0,1,0,0 adds r8 = 28, r32 adds r9 = 24, r32 adds r10 = 20, r32 adds r11 = 16, r32 ;; ldfs f6 = [r8] ;; ldfs f6 = [r9] adds r8 = 12, r32 adds r9 = 8, r32 adds r14 = 4, r32 ;; ldfs f6 = [r10] ;; ldfs f6 = [r11] ldfs f8 = [r8] ;; ldfs f6 = [r9] ;; ldfs f6 = [r14] ;; ldfs f6 = [r32] mov ar.pfs = r3 br.ret.sptk.many rp llvm-svn: 27297
* Delete dead loads in the dag. This allows us to compileChris Lattner2006-03-311-0/+5
| | | | | | | | | | | | | | | | | | | | | | | vector.ll:test_extract_elt2 into: _test_extract_elt2: lfd f1, 32(r3) blr instead of: _test_extract_elt2: lfd f0, 56(r3) lfd f0, 48(r3) lfd f0, 40(r3) lfd f1, 32(r3) lfd f0, 24(r3) lfd f0, 16(r3) lfd f0, 8(r3) lfd f0, 0(r3) blr llvm-svn: 27296
* Implement PromoteOp for VEXTRACT_VECTOR_ELT. Thsi fixesChris Lattner2006-03-311-42/+54
| | | | | | Generic/vector.ll:test_extract_elt on non-sse X86 systems. llvm-svn: 27294
* Scalarized vector stores need not be legal, e.g. if the vector element typeChris Lattner2006-03-311-0/+3
| | | | | | | needs to be promoted or expanded. Relegalize the scalar store once created. This fixes CodeGen/Generic/vector.ll:test1 on non-SSE x86 targets. llvm-svn: 27293
* Make sure to pass enough values to phi nodes when we are dealing withChris Lattner2006-03-311-2/+10
| | | | | | decimated vectors. This fixes UnitTests/Vector/sumarray-dbl.c llvm-svn: 27280
* Significantly improve handling of vectors that are live across basic blocks,Chris Lattner2006-03-313-52/+101
| | | | | | | handling cases where the vector elements need promotion, expansion, and when the vector type itself needs to be decimated. llvm-svn: 27278
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