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* Fix a problem where the TwoAddressInstructionPass which generate redundant ↵Eric Christopher2015-03-031-0/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | register moves in a loop. From: int M, total; void foo() { int i; for (i = 0; i < M; i++) { total = total + i / 2; } } This is the kernel loop: .LBB0_2: # %for.body =>This Inner Loop Header: Depth=1 movl %edx, %esi movl %ecx, %edx shrl $31, %edx addl %ecx, %edx sarl %edx addl %esi, %edx incl %ecx cmpl %eax, %ecx jl .LBB0_2 -------------------------- The first mov insn "movl %edx, %esi" could be removed if we change "addl %esi, %edx" to "addl %edx, %esi". The IR before TwoAddressInstructionPass is: BB#2: derived from LLVM BB %for.body Predecessors according to CFG: BB#1 BB#2 %vreg3<def> = COPY %vreg12<kill>; GR32:%vreg3,%vreg12 %vreg2<def> = COPY %vreg11<kill>; GR32:%vreg2,%vreg11 %vreg7<def,tied1> = SHR32ri %vreg3<tied0>, 31, %EFLAGS<imp-def,dead>; GR32:%vreg7,%vreg3 %vreg8<def,tied1> = ADD32rr %vreg3<tied0>, %vreg7<kill>, %EFLAGS<imp-def,dead>; GR32:%vreg8,%vreg3,%vreg7 %vreg9<def,tied1> = SAR32r1 %vreg8<kill,tied0>, %EFLAGS<imp-def,dead>; GR32:%vreg9,%vreg8 %vreg4<def,tied1> = ADD32rr %vreg9<kill,tied0>, %vreg2<kill>, %EFLAGS<imp-def,dead>; GR32:%vreg4,%vreg9,%vreg2 %vreg5<def,tied1> = INC64_32r %vreg3<kill,tied0>, %EFLAGS<imp-def,dead>; GR32:%vreg5,%vreg3 CMP32rr %vreg5, %vreg0, %EFLAGS<imp-def>; GR32:%vreg5,%vreg0 %vreg11<def> = COPY %vreg4; GR32:%vreg11,%vreg4 %vreg12<def> = COPY %vreg5<kill>; GR32:%vreg12,%vreg5 JL_4 <BB#2>, %EFLAGS<imp-use,kill> Now TwoAddressInstructionPass will choose vreg9 to be tied with vreg4. However, it doesn't see that there is copy from vreg4 to vreg11 and another copy from vreg11 to vreg2 inside the loop body. To remove those copies, it is necessary to choose vreg2 to be tied with vreg4 instead of vreg9. This code pattern commonly appears when there is reduction operation in a loop. So check for a reversed copy chain and if we encounter one then we can commute the add instruction so we can avoid a copy. Patch by Wei Mi. http://reviews.llvm.org/D7806 llvm-svn: 231148
* DAGCombiner::LoadedSlice: Remove explicit copy ctor in favor of the Rule of ZeroDavid Blaikie2015-03-031-3/+0
| | | | | | | This way, the copy assignment operator can be used without hitting the deprecated case in C++11. llvm-svn: 231144
* Revert "Remove the explicit SDNodeIterator::operator= in favor of the ↵David Blaikie2015-03-033-4/+6
| | | | | | | | | | | implicit default" Accidentally committed a few more of these cleanup changes than intended. Still breaking these out & tidying them up. This reverts commit r231135. llvm-svn: 231136
* Remove the explicit SDNodeIterator::operator= in favor of the implicit defaultDavid Blaikie2015-03-033-6/+4
| | | | | | | | | | There doesn't seem to be any need to assert that iterator assignment is between iterators over the same node - if you want to reuse an iterator variable to iterate another node, that's perfectly acceptable. Just don't mix comparisons between iterators into disjoint sequences, as usual. llvm-svn: 231135
* Remove LatencyPriorityQueue::dump because it relies on an implicit copy ctor ↵David Blaikie2015-03-031-13/+0
| | | | | | | | | | | | | which is deprecated in C++11 (due to the presence of a user-declare dtor in the base class) This type could be made copyable (= default a protected copy ctor in the base class, and preferably make the derived class final to avoid risks of providing a slicing copy operation to further derived classes) but it seemed easier to avoid that complexity for a dump function that I assume (by symmetry with ResourcePriorityQueue's dump, which was actively buggy) not often used. llvm-svn: 231133
* unique_ptrify ResourcePriorityQueue::ResourceModelDavid Blaikie2015-03-031-1/+1
| | | | llvm-svn: 231127
* Remove ResourcePriorityQueue::dump as it relies on copying a non-copyable ↵David Blaikie2015-03-031-14/+0
| | | | | | type which would result in a double-delete llvm-svn: 231126
* Fixing problem with field initialization orderAndrew Kaylor2015-03-031-2/+2
| | | | llvm-svn: 231122
* Fix PR22762. When emitting a DWARF expression check whether this is theAdrian Prantl2015-03-031-6/+7
| | | | | | | | frame register before checking if there is a DWARF register number for it. Thanks to H.J. Lu for diagnosing this and providing the testcase! llvm-svn: 231121
* Outline cleanup handlers for native Windows C++ exception handlingAndrew Kaylor2015-03-031-97/+251
| | | | | | Differential Revision: http://reviews.llvm.org/D7865 llvm-svn: 231117
* Add a comment above findRepresentativeClass explaining why it'sEric Christopher2015-03-031-0/+4
| | | | | | where it is so that future generations can understand. llvm-svn: 231111
* Fix PR22750: non-determinism causes assertion failure in DWARF generationDario Domizioli2015-03-031-2/+5
| | | | | | | | | | | | | | | | | | | | | | | The cause of the issue is the interaction of two factors: 1) When generating a DW_TAG_imported_declaration DIE which imports another imported declaration, the code in AsmPrinter/DwarfCompileUnit.cpp asserts that the second imported declaration must already have a DIE. 2) There is a non-determinism in the order in which imported declarations within the same scope are processed. Because of the non-determinism (2), it is possible that an imported declaration is processed before another one it depends on, breaking the assumption in (1). The source of the non-determinism is that the imported declaration DIDescriptors are sorted by scope in DwarfDebug::beginModule(); however that sort is not a stable_sort, therefore the order of the declarations within the same scope is not preserved. The attached patch changes the std::sort to a std::stable_sort and it fixes the problem. Test omitted due to it being non-deterministic and depending on the implementation of std::sort. llvm-svn: 231100
* During PHI elimination, split critical edges that move copies out of loops.Daniel Jasper2015-03-031-7/+13
| | | | | | | | | | | | | | | | | | | | This prevents the behavior observed in llvm.org/PR22369. I am not sure whether I am reading the code correctly, but the early exit based on isLiveOutPastPHIs() seems to make the wrong assumption that RegisterCoalescer won't be able to coalesce those copies later. This change hides the new behavior behind -no-phi-elim-live-out-early-exit as it currently breaks four tests: * Assertion in: CodeGen/Hexagon/hwloop-cleanup.ll * Worse code in: CodeGen/X86/coalescer-commute4.ll CodeGen/X86/phys_subreg_coalesce-2.ll CodeGen/X86/zlib-longest-match.ll The root cause here seems to be that the heuristic that determines the visitation order in RegisterCoalescer gets less lucky. llvm-svn: 231064
* Remap arguments and non-alloca values used by outlined C++ exception handlers.Andrew Kaylor2015-03-031-40/+76
| | | | | | Differential Revision: http://reviews.llvm.org/D7844 llvm-svn: 231042
* Revert "Revert "For the dwarf expression code get the subtarget off of the ↵Adrian Prantl2015-03-022-6/+8
| | | | | | | | current"" This reapplies r230990 without modifications. llvm-svn: 231024
* Refactor DebugLocDWARFExpression so it doesn't require access to theAdrian Prantl2015-03-028-137/+175
| | | | | | | | | | | | | | TargetRegisterInfo. DebugLocEntry now holds a buffer with the raw bytes of the pre-calculated DWARF expression. Ought to be NFC, but it does slightly alter the output format of the textual assembly. This reapplies 230930 without the assertion in DebugLocEntry::finalize() because not all Machine registers can be lowered into DWARF register numbers and floating point constants cannot be expressed. llvm-svn: 231023
* Use read{16,32,64}{le,be}() instead of ↵Rui Ueyama2015-03-022-4/+4
| | | | | | *reinterpret_cast<u{little,big}{16,32,64}_t>(). llvm-svn: 231016
* Revert "Refactor DebugLocDWARFExpression so it doesn't require access to the"Adrian Prantl2015-03-028-165/+125
| | | | | | This reverts commit 230975 to investigate buildbot breakage. llvm-svn: 231004
* Revert "For the dwarf expression code get the subtarget off of the current"Adrian Prantl2015-03-022-8/+6
| | | | | | This reverts commit 230990 because also reverting 230975. llvm-svn: 231003
* For the dwarf expression code get the subtarget off of the currentEric Christopher2015-03-022-6/+8
| | | | | | MachineFunction. llvm-svn: 230990
* Refactor DebugLocDWARFExpression so it doesn't require access to theAdrian Prantl2015-03-028-125/+165
| | | | | | | | | | | | | TargetRegisterInfo. DebugLocEntry now holds a buffer with the raw bytes of the pre-calculated DWARF expression. Ought to be NFC, but it does slightly alter the output format of the textual assembly. This reapplies 230930 with a relaxed assertion in DebugLocEntry::finalize() that allows for empty DWARF expressions for constant FP values. llvm-svn: 230975
* Accidentaly inverted the condition again. Sorry.Benjamin Kramer2015-03-021-1/+1
| | | | llvm-svn: 230973
* Avoid assertion in MSVC 2013 debug builds.Benjamin Kramer2015-03-021-1/+1
| | | | llvm-svn: 230972
* Simplify code. NFC.Benjamin Kramer2015-03-021-11/+3
| | | | llvm-svn: 230948
* Revert r230930, it caused PR22747.Nico Weber2015-03-028-164/+125
| | | | llvm-svn: 230932
* Refactor DebugLocDWARFExpression so it doesn't require access to theAdrian Prantl2015-03-028-125/+164
| | | | | | | | | | TargetRegisterInfo. DebugLocEntry now holds a buffer with the raw bytes of the pre-calculated DWARF expression. Ought to be NFC, but it does slightly alter the output format of the textual assembly. llvm-svn: 230930
* [PBQP] Address post-commit style comment for r230904. NFC.Arnaud A. de Grandmaison2015-03-011-2/+2
| | | | | | Thanks David ! llvm-svn: 230908
* [PBQP] Do not add an edge between nodes with totally disjoint allowed registersArnaud A. de Grandmaison2015-03-011-9/+61
| | | | | | | | | | | Such edges are zero matrix, and they bring no additional info to the allocation problem, apart from contributing to nodes' degree. Removing those edges is expected to improve allocation time. Tune the spill cost comparison, as this gives better average performances now that the nodes' degrees has changed. llvm-svn: 230904
* avoid infinite looping when folding vector multiplies of constants (PR22698)Sanjay Patel2015-03-011-5/+14
| | | | | | | | | | | | | | | We were missing a check for the following fold in DAGCombiner: // fold (fmul (fmul x, c1), c2) -> (fmul x, (fmul c1, c2)) If 'x' is also a constant, then we shouldn't do anything. Otherwise, we could end up swapping the operands back and forth forever. This should fix: http://llvm.org/bugs/show_bug.cgi?id=22698 Differential Revision: http://reviews.llvm.org/D7917 llvm-svn: 230884
* DwarfAccelTable: We know how many hashes we have in the output, just reserve ↵Benjamin Kramer2015-02-281-0/+1
| | | | | | the precise number llvm-svn: 230865
* StackColoring: Move set instead of copying. NFC.Benjamin Kramer2015-02-281-1/+1
| | | | llvm-svn: 230864
* LiveRange: Replace a creative vector erase loop with std::remove_if.Benjamin Kramer2015-02-281-7/+3
| | | | | | | I didn't see this so far because it scans backwards, but that doesn't make it any less quadratic. NFC. llvm-svn: 230863
* Fixup for recent -fast-isel-abort change: code didn't match descriptionMehdi Amini2015-02-281-1/+4
| | | | | | | | Level 1 should abort for all instructions but call/terminators/args. Instead it was aborting only if the level was > 2 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 230861
* Convert push_back loops into append calls.Benjamin Kramer2015-02-281-4/+2
| | | | | | No functionality change intended. llvm-svn: 230849
* ArrayRefize memory operand folding. NFC.Benjamin Kramer2015-02-281-18/+12
| | | | llvm-svn: 230846
* Replace std::copy with a back inserter with vector append where feasibleBenjamin Kramer2015-02-283-14/+8
| | | | | | | | | All of the cases were just appending from random access iterators to a vector. Using insert/append can grow the vector to the perfect size directly and moves the growing out of the loop. No intended functionalty change. llvm-svn: 230845
* MachineDominators: Move applySplitCriticalEdges into the cpp file.Benjamin Kramer2015-02-271-0/+66
| | | | | | | It's too big for inlining anyways. Also clean it up slightly. No functionality change intended. llvm-svn: 230806
* Reduce double set lookups.Benjamin Kramer2015-02-271-2/+1
| | | | llvm-svn: 230798
* Remove the Forward Control Flow Integrity pass and its dependencies.Eric Christopher2015-02-275-738/+0
| | | | | | | | | This work is currently being rethought along different lines and if this work is needed it can be resurrected out of svn. Remove it for now as no current work in ongoing on it and it's unused. Verified with the authors before removal. llvm-svn: 230780
* Change the fast-isel-abort option from bool to int to enable "levels"Mehdi Amini2015-02-271-24/+24
| | | | | | | | | | | | | | | | | | | | | | | Summary: Currently fast-isel-abort will only abort for regular instructions, and just warn for function calls, terminators, function arguments. There is already fast-isel-abort-args but nothing for calls and terminators. This change turns the fast-isel-abort options into an integer option, so that multiple levels of strictness can be defined. This will help no being surprised when the "abort" option indeed does not abort, and enables the possibility to write test that verifies that no intrinsics are forgotten by fast-isel. Reviewers: resistor, echristo Subscribers: jfb, llvm-commits Differential Revision: http://reviews.llvm.org/D7941 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 230775
* Centralize handling of the eh_begin and eh_end labels.Rafael Espindola2015-02-275-33/+28
| | | | | | | | | | This removes a bit of duplicated code and more importantly, remembers the labels so that they don't need to be looked up by name. This in turn allows for any name to be used and avoids a crash if the name we wanted was already taken. llvm-svn: 230772
* Don't modify the DenseMap being iterated over from within the loopSanjoy Das2015-02-271-3/+6
| | | | | | | | | | | that is iterating over it Inserting elements into a `DenseMap` invalidated iterators pointing into the `DenseMap` instance. Differential Revision: http://reviews.llvm.org/D7924 llvm-svn: 230719
* Rewrite MachineOperand::print and MachineInstr::print to avoidEric Christopher2015-02-275-43/+30
| | | | | | | | | | | | uses of TM->getSubtargetImpl and propagate to all calls. This could be a debugging regression in places where we had a TargetMachine and/or MachineFunction but don't have it as part of the MachineInstr. Fixing this would require passing a MachineFunction/Function down through the print operator, but none of the existing uses in tree seem to do this. llvm-svn: 230710
* Put jump tables in distinct sections if -ffunction-sections is used.Rafael Espindola2015-02-261-20/+28
| | | | | | | A small regression in r230411 was that we were basing the decision on -fdata-sections. llvm-svn: 230707
* Remove DebugLoc::print(LLVMContext, raw_ostream), it was justEric Christopher2015-02-261-8/+2
| | | | | | forwarding to the one that didn't take a context. llvm-svn: 230700
* getRegForInlineAsmConstraint wants to use TargetRegisterInfo forEric Christopher2015-02-264-38/+46
| | | | | | | | | a lookup, pass that in rather than use a naked call to getSubtargetImpl. This involved passing down and around either a TargetMachine or TargetRegisterInfo. Update all callers/definitions around the targets and SelectionDAG. llvm-svn: 230699
* Add a TargetMachine argument to the AddressingModeMatcher, we'llEric Christopher2015-02-261-10/+14
| | | | | | | need this shortly to get a TargetRegisterInfo from the subtarget for TargetLowering routines. llvm-svn: 230698
* Simplify arange output.Rafael Espindola2015-02-262-68/+43
| | | | | | | Move SectionMap to its only user (emitDebugARanges) and reorder to save a call to sort. llvm-svn: 230693
* When the source has a series of assignments, users reasonably want toPaul Robinson2015-02-261-0/+3
| | | | | | | | | | | | have the debugger step through each one individually. Turn off the combine for adjacent stores at -O0 so we get this behavior. Possibly, DAGCombine shouldn't run at all at -O0, but that's for another day; see PR22346. Differential Revision: http://reviews.llvm.org/D7181 llvm-svn: 230659
* Remove an argument-less call to getSubtargetImpl from TargetLoweringBase.Eric Christopher2015-02-261-6/+6
| | | | | | | | | This required plumbing a TargetRegisterInfo through computeRegisterProperties and into findRepresentativeClass which uses it for register class iteration. This required passing a subtarget into a few target specific initializations of TargetLowering. llvm-svn: 230583
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