| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 121741
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spill weight. Filter out fixed registers instead.
Add support for reassigning an interference that was assigned to an alias.
llvm-svn: 121737
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llvm-svn: 121736
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when the wider type is legal. This allows us to compile:
define zeroext i16 @test1(i16 zeroext %x) nounwind {
entry:
%div = udiv i16 %x, 33
ret i16 %div
}
into:
test1: # @test1
movzwl 4(%esp), %eax
imull $63551, %eax, %eax # imm = 0xF83F
shrl $21, %eax
ret
instead of:
test1: # @test1
movw $-1985, %ax # imm = 0xFFFFFFFFFFFFF83F
mulw 4(%esp)
andl $65504, %edx # imm = 0xFFE0
movl %edx, %eax
shrl $5, %eax
ret
Implementing rdar://8760399 and example #4 from:
http://blog.regehr.org/archives/320
We should implement the same thing for [su]mul_hilo, but I don't
have immediate plans to do this.
llvm-svn: 121696
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for each constant pool entry. Using WriteTypeSymbolic here takes time
proportional to the size of the module, for each constant pool entry.
This speeds up -verbose-asm llc on 252.eon (a random testcase at my disposal)
from 4.4s to 2.137s. llc takes 2.11s with asm-verbose off, so this is now a
pretty reasonable cost for verbose comments.
llvm-svn: 121691
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llvm-svn: 121662
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catch this here rather than later after accessing uninitialized memory
etc. Fires when compiling the testcase in PR8237.
llvm-svn: 121635
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llvm-svn: 121604
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llvm-svn: 121599
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Fix build breakage.
llvm-svn: 121596
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lib/CodeGen/RegAllocGreedy.cpp:233: error: unused variable 'TRC' [-Wunused-variable]
llvm-svn: 121594
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Soon, RegAllocGreedy will start splitting live ranges, and then deferred
spilling won't work anyway.
llvm-svn: 121591
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The spiller should only spill. The register allocator will drive live range
splitting, it has the needed information about register pressure and
interferences.
llvm-svn: 121590
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llvm-svn: 121584
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interference check.
llvm-svn: 121519
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registers for a given virtual register.
Reserved registers are filtered from the allocation order, and any valid hint is
returned as the first suggestion.
For target dependent hints, a number of arcane target hooks are invoked.
llvm-svn: 121497
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llvm-svn: 121471
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llvm-svn: 121461
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f:
.cfi_startproc
nop
.cfi_endproc
assembled (on ELF).
llvm-svn: 121434
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Necessary for byval support on ARM. Radar 7662569.
llvm-svn: 121412
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llvm-svn: 121411
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llvm-svn: 121410
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heuristic to reshuffle register assignments when we can't find an
available reg.
llvm-svn: 121388
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llvm-svn: 121356
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references instead.
Similarly, IntervalMap::begin() is almost as expensive as find(), so use find(x)
instead of begin().advanceTo(x);
This makes RegAllocBasic run another 5% faster.
llvm-svn: 121344
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instead.
This fixes radar 8730409.
llvm-svn: 121323
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llvm-svn: 121319
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The hint is simply tried first and then forgotten if it couldn't be allocated
immediately.
llvm-svn: 121306
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abstract priority queue interface in subclasses that want to override the
priority calculations.
Subclasses must provide a getPriority() implementation instead.
This approach requires less code as long as priorities are expressable as simple
floats, and it avoids the dangers of defining potentially expensive priority
comparison functions.
It also should speed up priority_queue operations since they no longer have to
chase pointers when comparing registers. This is not measurable, though.
Preferably, we shouldn't use floats to guide code generation. The use of floats
here is derived from the use of floats for spill weights. Spill weights have a
dynamic range that doesn't lend itself easily to a fixpoint implementation.
When someone invents a stable spill weight representation, it can be reused for
allocation priorities.
llvm-svn: 121294
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llvm-svn: 121293
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llvm-svn: 121285
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llvm-svn: 121283
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both forward and backward scheduling. Rename it to
ScoreboardHazardRecognizer (Scoreboard is one word). Remove integer
division from the scoreboard's critical path.
llvm-svn: 121274
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This new register allocator is initially identical to RegAllocBasic, but it will
receive all of the tricks that RegAllocBasic won't get.
RegAllocGreedy will eventually replace linear scan.
llvm-svn: 121234
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Minor optimization to the use of IntervalMap iterators. They are fairly
heavyweight, so prefer SI.valid() over SI != end().
llvm-svn: 121217
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This speeds up RegAllocBasic by 20%, not counting releaseMemory which becomes
way faster.
llvm-svn: 121201
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llvm-svn: 121162
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zextOrTrunc(), and APSInt methods extend(), extOrTrunc() and new method
trunc(), to be const and to return a new value instead of modifying the
object in place.
llvm-svn: 121120
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llvm-svn: 121098
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This will be used to truncate live range of DBG_VALUE instruction by register allocator and friends.
llvm-svn: 121061
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message instead of creating DBG_VALUE for undefined value in reg0.
llvm-svn: 121059
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as llc + llvm-mc. This time ELF is not changed and I tested that llvm-gcc
bootstrap on darwin10 using darwin9's assembler and linker.
llvm-svn: 121006
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linux and darwin assemblers happy :-(
llvm-svn: 121004
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that no relocations are used (on MochO).
Fixes llc producing different output from llc + llvm-mc.
llvm-svn: 121000
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StrongPHIElimination.
llvm-svn: 120961
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llvm-svn: 120959
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PHIElimination.h.
llvm-svn: 120953
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time, this method existed, but now PHIElimination uses the method of the same
name on MachineBasicBlock.
llvm-svn: 120952
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function so that it can be shared with StrongPHIElimination.
llvm-svn: 120951
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llvm-svn: 120918
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