summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
Commit message (Expand)AuthorAgeFilesLines
* Add a fixme here.Eric Christopher2011-12-161-0/+1
* Extraneous whitespace and 80-col.Eric Christopher2011-12-161-3/+2
* Move parts of lib/Target that use CodeGen into lib/CodeGen.Nick Lewycky2011-12-154-0/+129
* Update DebugLoc while merging nodes at -O0.Devang Patel2011-12-152-6/+21
* Don't try to form FGETSIGN after legalization; it is possible in some cases, ...Eli Friedman2011-12-151-1/+2
* Enable synthesis of FLOG2 and FEXP2 SelectionDAG nodes from libm calls. Thes...Owen Anderson2011-12-151-0/+22
* Move Instruction::isSafeToSpeculativelyExecute out of VMCore andDan Gohman2011-12-141-2/+3
* Do not sink instruction, if it is not profitable.Devang Patel2011-12-141-13/+76
* Reapply r146481 with a fix to create the Builder value in the correct place andBill Wendling2011-12-141-6/+35
* Model ARM predicated write as read-mod-write. e.g.Evan Cheng2011-12-141-2/+2
* llvm/lib/CodeGen: Fix cmake build since r146542.NAKAMURA Takumi2011-12-141-0/+1
* Add missing cases to SDNode::getOperationName(). Patch by Micah Villmow.Eli Friedman2011-12-141-0/+5
* Allow target to specify register output dependency. Still default to one.Evan Cheng2011-12-141-1/+7
* Revert r146481 to review possible miscompilations.Bill Wendling2011-12-141-33/+6
* - Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a functionEvan Cheng2011-12-148-51/+297
* DW_AT_virtuality is also defined to be constant, not flag.Nick Lewycky2011-12-141-2/+2
* [fast-isel] Remove SelectInsertValue() as fast-isel wasn't designed to handle Chad Rosier2011-12-131-103/+0
* Avoid using the 'insertvalue' instruction here.Bill Wendling2011-12-131-6/+33
* DW_AT_accessibility is "constant" class, not form class, so it may not useNick Lewycky2011-12-131-6/+6
* Initial CodeGen support for CTTZ/CTLZ where a zero input produces anChandler Carruth2011-12-137-23/+79
* [fast-isel] Guard "exhastive" fast-isel output with -fast-isel-verbose2.Chad Rosier2011-12-131-1/+6
* LLVMBuild: Introduce a common section which currently has a list of theDaniel Dunbar2011-12-121-0/+3
* Fixed register allocator splitting a live range on a spilling variable.Pete Cooper2011-12-123-4/+25
* LLVMBuild: Remove trailing newline, which irked me.Daniel Dunbar2011-12-123-3/+0
* [fast-isel] SelectInsertValue seems to be causing miscompiles for ARM. Disab...Chad Rosier2011-12-101-0/+1
* Typo.Chad Rosier2011-12-101-1/+1
* [fast-isel] Add support for selecting insertvalue.Chad Rosier2011-12-091-0/+102
* Move isUnpredicatedTerminator() default implementation to TargetInstrInfoImpl...Evan Cheng2011-12-091-0/+13
* Fix comment.Devang Patel2011-12-091-2/+1
* Update stale comment.Devang Patel2011-12-091-4/+1
* Fix a couple of logic bugs in TargetLowering::SimplifyDemandedBits. PR11514.Eli Friedman2011-12-091-4/+3
* Revert r146184. I am seeing performance regression cause by this patch in one...Devang Patel2011-12-081-10/+11
* Enhance both TargetLibraryInfo and SelectionDAGBuilder so that the latter can...Owen Anderson2011-12-083-15/+43
* Refactor. No intentional functionality change.Devang Patel2011-12-081-29/+41
* Add rather verbose stats for fast-isel failures.Chad Rosier2011-12-081-0/+153
* Filter "sink to" candidate blocks sooner. This avoids unnecessary computation...Devang Patel2011-12-081-11/+13
* Teach SelectionDAG to match more calls to libm functions onto existing SDNode...Owen Anderson2011-12-082-10/+67
* Make MachineInstr instruction property queries more flexible. This change allEvan Cheng2011-12-081-5/+5
* Fix a bug in the integer-promotion of bitcast operations on vector types.Nadav Rotem2011-12-081-1/+1
* Reverting r145899 as it breaks clang self-hostingPete Cooper2011-12-081-0/+66
* Make sure we correctly set LiveRegGens when a call is unscheduled. <rdar://p...Eli Friedman2011-12-071-1/+8
* Fix an assertion in the scheduler. PR11386. No testcase included because it...Eli Friedman2011-12-071-3/+2
* These global variables aren't thread-safe, STATISTIC is. Andy Trick tells meNick Lewycky2011-12-071-66/+12
* Remove unneeded semicolon.Jakub Staszak2011-12-071-3/+3
* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-0735-148/+152
* Zap unnecessary isIntDivCheap() check. PR11485. No testcase because this do...Eli Friedman2011-12-071-1/+1
* Add missing check.Jakob Stoklund Olesen2011-12-071-1/+1
* Support vector bitcasts in the AsmPrinter. PR11495.Eli Friedman2011-12-071-2/+24
* Add MachineOperand IsInternalRead flag.Jakob Stoklund Olesen2011-12-071-5/+18
* Fix an optimization involving EXTRACT_SUBVECTOR in DAGCombine so it behaves c...Eli Friedman2011-12-071-13/+17
OpenPOWER on IntegriCloud