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path: root/llvm/lib/CodeGen/VirtRegRewriter.cpp
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* Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves ↵Evan Cheng2009-07-011-2/+6
| | | | | | the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details. llvm-svn: 74580
* Add a bit IsUndef to MachineOperand. This indicates the def / use register ↵Evan Cheng2009-06-301-26/+22
| | | | | | | | | | operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them. The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing. This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def. llvm-svn: 74518
* Removed SimpleRewriter.Lang Hames2009-06-041-82/+2
| | | | llvm-svn: 72880
* Fix for PR4225: When rewriter reuse a value in a physical register , it ↵Evan Cheng2009-06-031-5/+19
| | | | | | clear the register kill operand marker and its kill ops information. However, the cleared operand may be a def of a super-register. Clear the kill ops info for the super-register's sub-registers as well. llvm-svn: 72758
* Update to in-place spilling framework. Includes live interval scaling and ↵Lang Hames2009-06-021-3/+42
| | | | | | trivial rewriter. llvm-svn: 72729
* Fix PR4210. Rewritter should track and update kills of sub-registers as well.Evan Cheng2009-05-151-42/+63
| | | | llvm-svn: 71848
* Teach TransferDeadness to delete truly dead instructions if they do not ↵Evan Cheng2009-05-121-13/+37
| | | | | | produce side effects. llvm-svn: 71606
* Renamed Spiller classes (plus uses and related files) to VirtRegRewriter.Lang Hames2009-05-061-0/+2141
llvm-svn: 71057
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