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path: root/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
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* TiedTo flag can now be placed on implicit operands. isTwoAddrUse() should lookEvan Cheng2013-05-021-5/+3
| | | | | | | | | | | at all of the operands. Previously it was skipping over implicit operands which cause infinite looping when the two-address pass try to reschedule a two-address instruction below the kill of tied operand. I'm unable to come up with a reasonably sized test case. rdar://13747577 llvm-svn: 180906
* Register Coalescing: add a flag to disable rescheduling.Andrew Trick2013-04-241-2/+8
| | | | | | | | When MachineScheduler is enabled, this functionality can be removed. Until then, provide a way to disable it for test cases and designing MachineScheduler heuristics. llvm-svn: 180192
* Remove unused #includes.Bill Wendling2013-03-051-1/+0
| | | | llvm-svn: 176467
* Add a use of an otherwise unused variable to remove a warning in non-AssertsCameron Zwarich2013-02-241-0/+1
| | | | | | builds. llvm-svn: 175981
* TwoAddressInstructionPass::tryInstructionTransform() only potentially returnsCameron Zwarich2013-02-241-5/+4
| | | | | | | true when shouldOnlyCommute is false, so we can remove code that checks otherwise. llvm-svn: 175980
* TwoAddrInstructionPass::tryInstructionTransform() has a case where it callsCameron Zwarich2013-02-241-5/+10
| | | | | | | | | | | | | | | | itself recursively with a new instruction that has not been finalized, in order to determine whether to keep the instruction. On 'make check' and test-suite the only cases where the recursive invocation made any transformations were simple instruction commutations, so I am restricting the recursive invocation to do only this. The other cases wouldn't work correctly when updating LiveIntervals, since the new instructions don't have slot indices and LiveIntervals hasn't yet been updated. If the other transformations were actually triggering in any test case it would be possible to support it with a lot of effort, but since they don't it's not worth it. llvm-svn: 175979
* TargetInstrInfo::commuteInstruction() doesn't actually return a new instructionCameron Zwarich2013-02-231-13/+3
| | | | | | | unless it was requested to with an optional parameter that defaults to false, so we don't need to handle that case in TwoAddressInstructionPass. llvm-svn: 175974
* Fix a bug with the LiveIntervals updating in the two-address pass found byCameron Zwarich2013-02-231-1/+1
| | | | | | running ASCI_Purple/SMG2000 in the test-suite. llvm-svn: 175957
* Make TwoAddressInstructionPass::sink3AddrInstruction() LiveIntervals-aware.Cameron Zwarich2013-02-231-15/+34
| | | | llvm-svn: 175956
* Make rescheduleMIBelowKill() and rescheduleKillAboveMI() LiveIntervals-aware inCameron Zwarich2013-02-231-30/+85
| | | | | | | | TwoAddressInstructionPass. The code in rescheduleMIBelowKill() is a bit tricky, since multiple instructions need to be moved down, one-at-a-time, in reverse order. llvm-svn: 175955
* Stop relying on physical register kill flags in isKilled() in the two-addressCameron Zwarich2013-02-211-3/+10
| | | | | | | | | | | | | | pass. One of the callers of isKilled() can cope with overapproximation of kills and the other can't, so I added a flag to indicate this. In theory this could pessimize code slightly, but in practice most physical register uses are kills, and most important kills of physical registers are the only uses of that register prior to register allocation, so we can recognize them as kills even without kill flags. This is relevant because LiveIntervals gets rid of all kill flags. llvm-svn: 175821
* Make another kill check LiveIntervals-aware.Cameron Zwarich2013-02-211-1/+1
| | | | | | | This brings the number of remaining failures in 'make check' without LiveVariables down to 39, with 1 unexpectedly passing test. llvm-svn: 175727
* Split part of isKilled() into a separate function for use elsewhere.Cameron Zwarich2013-02-211-22/+28
| | | | llvm-svn: 175726
* Update isKilledAt in TwoAddressInstructionPass.cpp to use LiveIntervals whenCameron Zwarich2013-02-211-4/+26
| | | | | | | | | | available. With this commit there are no longer any assertion or verifier failures when running 'make check' without LiveVariables. There are still 56 failing tests with codegen differences and 1 unexpectedly passing test. llvm-svn: 175719
* Only use LiveIntervals in TwoAddressInstructionPass, not a mix of LiveintervalsCameron Zwarich2013-02-201-6/+4
| | | | | | and SlotIndexes. llvm-svn: 175674
* Find anchoring end points for repairIntervalsInRange and repairIndexesInRangeCameron Zwarich2013-02-201-12/+5
| | | | | | automatically. llvm-svn: 175673
* Fully qualify llvm::next to avoid ambiguity when building as C++11.David Blaikie2013-02-201-2/+3
| | | | llvm-svn: 175608
* Add support to the two-address pass for updating LiveIntervals in many of theCameron Zwarich2013-02-201-3/+62
| | | | | | | common transformations. This includes updating repairIntervalsInRange() to handle more cases. llvm-svn: 175604
* Move the computation of the IsEarlyClobber flag into its own loop, since theCameron Zwarich2013-02-201-1/+5
| | | | | | | correct value is needed in every iteration of the loop for updating LiveIntervals. llvm-svn: 175603
* Remove verification after PHIElimination when using LiveIntervals, and move itCameron Zwarich2013-02-201-0/+3
| | | | | | | after the two-address pass. The remaining problems in 'make check' are occurring later. llvm-svn: 175598
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-1/+1
| | | | | | | | | | | | | | | | | | | | | into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. llvm-svn: 171366
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-10/+10
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* Simplify REG_SEQUENCE lowering.Jakob Stoklund Olesen2012-12-011-187/+69
| | | | | | | | | | | The TwoAddressInstructionPass takes the machine code out of SSA form by expanding REG_SEQUENCE instructions into copies. It is no longer necessary to rewrite the registers used by a REG_SEQUENCE instruction because the new coalescer algorithm can do it now. REG_SEQUENCE is just converted to a sequence of sub-register copies now. llvm-svn: 169067
* Reduce indentation with early exit.Jakob Stoklund Olesen2012-10-261-22/+21
| | | | | | No functional change. llvm-svn: 166829
* Also make the current basic block a class member.Jakob Stoklund Olesen2012-10-261-65/+53
| | | | | | Don't pass it around everywhere as a function argument. llvm-svn: 166828
* Make the Processed set a class member.Jakob Stoklund Olesen2012-10-261-21/+14
| | | | | | Don't pass it everywhere as an argument. llvm-svn: 166820
* Fix whitespace and function names to be coding standardy.Jakob Stoklund Olesen2012-10-261-148/+149
| | | | | | No functional change. llvm-svn: 166814
* Remove the canCombineSubRegIndices() target hook.Jakob Stoklund Olesen2012-10-261-129/+0
| | | | | | | The new coalescer can already do all of this, so there is no need to duplicate the efforts. llvm-svn: 166813
* Stop adding <imp-def> operands when expanding REG_SEQUENCE.Jakob Stoklund Olesen2012-09-171-4/+0
| | | | | | | | | | These extra operands are not needed by register allocators using VirtRegRewriter, and RAFast don't need them any longer. By omitting the <imp-def> operands, it becomes possible for the new register coalescer to track which lanes are valid and which are undef. llvm-svn: 164073
* Search the whole instruction for tied operands.Jakob Stoklund Olesen2012-09-041-2/+1
| | | | | | | Implicit uses can be dynamically tied to defs. This will soon be used for predicated instructions on ARM. llvm-svn: 163177
* Add a getName function to MachineFunction. Use it in places that previously ↵Craig Topper2012-08-221-1/+1
| | | | | | did getFunction()->getName(). Remove includes of Function.h that are no longer needed. llvm-svn: 162347
* Remove the TII::scheduleTwoAddrSource() hook.Jakob Stoklund Olesen2012-08-131-11/+0
| | | | | | | | | | | | | | | It never does anything when running 'make check', and it get's in the way of updating live intervals in 2-addr. The hook was originally added to help form IT blocks in Thumb2 code before register allocation, but the pass ordering has changed since then, and we run if-conversion after register allocation now. When the MI scheduler is enabled, there will be no less than two schedulers between 2-addr and Thumb2ITBlockPass, so this hook is unlikely to help anything. llvm-svn: 161794
* Fix a future TwoAddressInstructionPass crash.Jakob Stoklund Olesen2012-08-091-1/+2
| | | | | | | No test case, the crash only happens when the default use list order is changed. llvm-svn: 161627
* Skip tied operand pairs that already have the same register.Jakob Stoklund Olesen2012-08-071-10/+11
| | | | llvm-svn: 161454
* Delete a dead variable.Jakob Stoklund Olesen2012-08-041-12/+0
| | | | | | TwoAddressInstructionPass doesn't remat any more. llvm-svn: 161285
* TwoAddressInstructionPass refactoring: Extract another method.Jakob Stoklund Olesen2012-08-031-121/+134
| | | | llvm-svn: 161284
* TwoAddressInstructionPass refactoring: Extract a method.Jakob Stoklund Olesen2012-08-031-48/+60
| | | | | | | No functional change intended, except replacing a DenseMap with a SmallDenseMap which should behave identically. llvm-svn: 161281
* Begin adding support for updating LiveIntervals in TwoAddressInstructionPass.Jakob Stoklund Olesen2012-08-031-0/+23
| | | | | | | This is far from complete, and only changes behavior when the -early-live-intervals flag is passed to llc. llvm-svn: 161273
* Delete dead function.Jakob Stoklund Olesen2012-08-031-28/+0
| | | | llvm-svn: 161242
* Don't delete dead code in TwoAddressInstructionPass.Jakob Stoklund Olesen2012-08-031-104/+0
| | | | | | | This functionality was added before we started running DeadMachineInstructionElim on all targets. It serves no purpose now. llvm-svn: 161241
* Disable rematerialization in TwoAddressInstructionPass.Manman Ren2012-07-251-78/+6
| | | | | | | | | | | It is redundant; RegisterCoalescer will do the remat if it can't eliminate the copy. Collected instruction counts before and after this. A few extra instructions are generated due to spilling but it is normal to see these kinds of changes with almost any small codegen change, according to Jakob. This also fixed rdar://11830760 where xor is expected instead of movi0. llvm-svn: 160749
* Fix a somewhat nasty crasher in PR13378. This crashes inside ofChandler Carruth2012-07-181-22/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LiveIntervals due to the two-addr pass generating bogus MI code. The crux of the issue was a loop nesting problem. The intent of the code which attempts to transform instructions before converting them to two-addr form is to defer and reprocess any transformed instructions as the second processing is likely to have more opportunities to coalesce copies, etc. Unfortunately, there was one section of processing that was not deferred -- the INSERT_SUBREG rewriting. Due to quirks of how this rewriting proceeded, not only did it occur early, it removed the bits of information needed for the deferred processing to correctly generate the necessary two address form (specifically inserting a copy), but didn't trigger any immediate assertions and produced what appeared to be already valid two-address from code. Thus, the assertion only fired much later in the pipeline. The fix is to hoist the transformation logic up layer to where it can more firmly defer all further processing, and to teach the normal processing to handle an edge case previously handled as part of the transformation logic. This edge case (already matched tied register operands) needs to *not* defer any steps. As has been brought up repeatedly in the process: wow does this code need refactoring. I *may* squeeze in some time to at least bring sanity to this loop... but wow... =] Thanks to Jakob for helpful hints on the way here, and the review. llvm-svn: 160443
* Add some trace output to TwoAddressInstructionPass.Jakob Stoklund Olesen2012-07-171-1/+4
| | | | llvm-svn: 160380
* Reapply r160194, switching to use LV information for finding local kills.Chandler Carruth2012-07-151-56/+32
| | | | | | | | | | | | | | | | | | | | | The notable fix is to look at any dependencies attached to the kill instruction (or other instructions between MI nad the kill) where the dependencies are specific to the register in question. The old code implicitly handled this by rejecting the transform if *any* other uses were found within the block, but after the start point. The new code directly finds the kill, and has to re-use the existing dependency scan to check for non-kill uses. This was caught by self-host, but I found the bug via inspection and use of absurd assert scaffolding to compute the kills in two ways and compare them. So I have no useful testcase for this other than "bootstrap". I'd work harder to reduce a test case if this particular code were likely to live for a long time. Thanks to Benjamin Kramer for reviewing the fix itself. llvm-svn: 160228
* Revert r160194, which switched to use LV information for finding localChandler Carruth2012-07-131-19/+54
| | | | | | | | kills. This is causing miscompiles that I'm working on tracking down. llvm-svn: 160196
* Use the LiveVariables information to efficiently get local kills. ThisChandler Carruth2012-07-131-54/+19
| | | | | | | | | | removes the largest scaling problem in the test cases from PR13225 when ASan is switched to insert basic blocks in the natural CFG order. It may also solve some scaling problems for more normal code with large numbers of basic blocks and variables. llvm-svn: 160194
* Added assertion in getVRegDef of MachineRegisterInfo to make sure the virtualManman Ren2012-07-021-5/+6
| | | | | | | register does not have multiple definitions. Modified TwoAddressInstructionPass to use getUniqueVRegDef instead of getVRegDef. llvm-svn: 159545
* Handle <undef> operands in TwoAddressInstructionPass.Jakob Stoklund Olesen2012-06-251-12/+31
| | | | | | | | | | | | | | | | | When the source register to a 2-addr instruction is undefined, there is no need to attempt any transformations - simply replace the source register with the destination register. This also comes up when lowering IMPLICIT_DEF instructions - make sure the <undef> flag is moved to the new partial register def operand: %vreg8<def> = INSERT_SUBREG %vreg9<undef>, %vreg0<kill>, sub_16bit rewrite undef: %vreg8<def> = INSERT_SUBREG %vreg8<undef>, %vreg0<kill>, sub_16bit convert to: %vreg8:sub_16bit<def,read-undef> = COPY %vreg0<kill> llvm-svn: 159120
* misched: API for minimum vs. expected latency.Andrew Trick2012-06-051-1/+1
| | | | | | | Minimum latency determines per-cycle scheduling groups. Expected latency determines critical path and cost. llvm-svn: 158021
* Properly constrain register classes in 2-addr.Jakob Stoklund Olesen2012-05-201-0/+6
| | | | | | | X86 has 2-addr instructions with different constraints on the tied def and use operands. One is GR32, one is GR32_NOSP. llvm-svn: 157149
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