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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-05-20 06:38:32 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-05-20 06:38:32 +0000 |
| commit | a103a516c6f516ef2fa104718594515cae5a00b9 (patch) | |
| tree | cea295fcd462b1046c844f9587e0bcf77cc37b7d /llvm/lib/CodeGen/TwoAddressInstructionPass.cpp | |
| parent | b8f950650b469f20d539fd6c219b56426899c21f (diff) | |
| download | bcm5719-llvm-a103a516c6f516ef2fa104718594515cae5a00b9.tar.gz bcm5719-llvm-a103a516c6f516ef2fa104718594515cae5a00b9.zip | |
Properly constrain register classes in 2-addr.
X86 has 2-addr instructions with different constraints on the tied def
and use operands. One is GR32, one is GR32_NOSP.
llvm-svn: 157149
Diffstat (limited to 'llvm/lib/CodeGen/TwoAddressInstructionPass.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/TwoAddressInstructionPass.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp index 8164690e40a..5218aa1f7a8 100644 --- a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp +++ b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp @@ -1555,6 +1555,12 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { MO.setIsKill(false); RemovedKillFlag = true; } + + // Make sure regA is a legal regclass for the SrcIdx operand. + if (TargetRegisterInfo::isVirtualRegister(regA) && + TargetRegisterInfo::isVirtualRegister(regB)) + MRI->constrainRegClass(regA, MRI->getRegClass(regB)); + MO.setReg(regA); if (isCopy) |
