bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Collapse)	Author	Age	Files	Lines
*	CodeGen: Refactor renameDisconnectedComponents() as a pass	Matthias Braun	2016-05-31	1	-0/+5
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Refactor LiveIntervals::renameDisconnectedComponents() to be a pass. Also change the name to "RenameIndependentSubregs": - renameDisconnectedComponents() worked on a MachineFunction at a time so it is a natural candidate for a machine function pass. - The algorithm is testable with a .mir test now. - This also fixes a problem where the lazy renaming as part of the MachineScheduler introduced IMPLICIT_DEF instructions after the number of a nodes in a region were counted leading to a mismatch. Differential Revision: http://reviews.llvm.org/D20507 llvm-svn: 271345
*	Factor PrologEpilogInserter around spilling, frame finalization, and scavenging	Derek Schuff	2016-05-17	1	-1/+11
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	PrologEpilogInserter has these 3 phases, which are related, but not all of them are needed by all targets. This patch reorganizes PEI's varous functions around those phases for more clear separation. It also introduces a new TargetMachine hook, usesPhysRegsForPEI, which is true for non-virtual targets. When it is true, all the phases operate as before, and PEI requires the AllVRegsAllocated property on MachineFunctions. Otherwise, CSR spilling and scavenging are skipped and only prolog/epilog insertion/frame finalization is done. Differential Revision: http://reviews.llvm.org/D18366 llvm-svn: 269750
*	TargetPassConfig: Set PrintMachineCode even if addMachinePasses() does not run.	Matthias Braun	2016-05-10	1	-5/+5
\| \| \| \|	llvm-svn: 269013
*	CodeGen: Move TargetPassConfig from Passes.h to an own header; NFC	Matthias Braun	2016-05-10	1	-0/+827
	Many files include Passes.h but only a fraction needs to know about the TargetPassConfig class. Move it into an own header. Also rename Passes.cpp to TargetPassConfig.cpp while we are at it. llvm-svn: 269011