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bcm5719-llvm
meklort-10.0.0
meklort-10.0.1
ortega-7.0.1
Project Ortega BCM5719 LLVM
Raptor Computing Systems
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path:
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llvm
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lib
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CodeGen
/
TargetInstrInfo.cpp
Commit message (
Expand
)
Author
Age
Files
Lines
*
[Scheduler] Adjust interface of CreateTargetMIHazardRecognizer to use Schedul...
David Green
2020-01-15
1
-3
/
+3
*
[Scheduler] Remove superfluous casts. NFC
David Green
2020-01-13
1
-4
/
+2
*
[DebugInfo] Make describeLoadedValue() reg aware
David Stenberg
2019-12-09
1
-5
/
+28
*
Revert "[DebugInfo] Make describeLoadedValue() reg aware"
David Stenberg
2019-12-09
1
-28
/
+5
*
[DebugInfo] Make describeLoadedValue() reg aware
David Stenberg
2019-12-09
1
-5
/
+28
*
[DebugInfo] Describe size of spilled values in call site params
Vedant Kumar
2019-11-19
1
-1
/
+5
*
[DebugInfo] Allow spill slots in call site parameter descriptions
Vedant Kumar
2019-11-14
1
-0
/
+21
*
Reland: [TII] Use optional destination and source pair as a return value; NFC
Djordje Todorovic
2019-11-08
1
-5
/
+4
*
Revert rG57ee0435bd47f23f3939f402914c231b4f65ca5e - [TII] Use optional destin...
Simon Pilgrim
2019-10-31
1
-4
/
+5
*
[TII] Use optional destination and source pair as a return value; NFC
Djordje Todorovic
2019-10-31
1
-5
/
+4
*
[ARM][AArch64][DebugInfo] Improve call site instruction interpretation
Djordje Todorovic
2019-10-30
1
-4
/
+6
*
[DebugInfo] Stop describing imms in TargetInstrInfo's describeLoadedValue() impl
David Stenberg
2019-10-23
1
-3
/
+0
*
Prune Analysis includes from SelectionDAG.h
Reid Kleckner
2019-10-19
1
-1
/
+1
*
[DebugInfo][If-Converter] Update call site info during the optimization
Nikola Prica
2019-10-08
1
-1
/
+1
*
[DebugInfo] Exclude memory location values as parameter entry values
Djordje Todorovic
2019-09-27
1
-12
/
+0
*
[TargetInstrInfo] Let findCommutedOpIndices take const MachineInstr&
Simon Pilgrim
2019-09-25
1
-1
/
+1
*
TargetInstrInfo::getStackSlotRange - fix "variable used but never read" analy...
Simon Pilgrim
2019-09-23
1
-1
/
+1
*
[MachinePipeliner] Improve the TargetInstrInfo API analyzeLoop/reduceLoopCount
James Molloy
2019-09-21
1
-0
/
+2
*
Revert "[MachinePipeliner] Improve the TargetInstrInfo API analyzeLoop/reduce...
Mitch Phillips
2019-09-20
1
-2
/
+0
*
[MachinePipeliner] Improve the TargetInstrInfo API analyzeLoop/reduceLoopCount
James Molloy
2019-09-20
1
-0
/
+2
*
[NFC] Make the describeLoadedValue() hook return machine operand objects
David Stenberg
2019-09-08
1
-3
/
+3
*
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
Daniel Sanders
2019-08-15
1
-10
/
+10
*
Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re...
Daniel Sanders
2019-08-01
1
-17
/
+16
*
Reland "[DwarfDebug] Dump call site debug info"
Djordje Todorovic
2019-07-31
1
-0
/
+31
*
Revert "[DwarfDebug] Dump call site debug info"
Djordje Todorovic
2019-07-12
1
-40
/
+0
*
[DwarfDebug] Dump call site debug info
Djordje Todorovic
2019-07-09
1
-0
/
+40
*
[Backend] Keep call site info valid through the backend
Djordje Todorovic
2019-06-27
1
-2
/
+8
*
CodeGen: Introduce a class for registers
Matt Arsenault
2019-06-24
1
-3
/
+3
*
[SystemZ, RegAlloc] Favor 3-address instructions during instruction selection.
Jonas Paulsson
2019-06-08
1
-2
/
+3
*
Allow target to handle STRICT floating-point nodes
Ulrich Weigand
2019-06-05
1
-1
/
+2
*
MC: Allow getMaxInstLength to depend on the subtarget
Matt Arsenault
2019-05-22
1
-3
/
+5
*
[CodeGen] Rename DEBUG_TYPE for default hazard recognizer.
Austin Kerbow
2019-05-07
1
-1
/
+1
*
Update the file headers across all of the LLVM projects in the monorepo
Chandler Carruth
2019-01-19
1
-4
/
+3
*
Remove FrameAccess struct from hasLoadFromStackSlot
Sander de Smalen
2018-09-05
1
-15
/
+10
*
Extend hasStoreToStackSlot with list of FI accesses.
Sander de Smalen
2018-09-03
1
-18
/
+13
*
[MI] Change the array of `MachineMemOperand` pointers to be
Chandler Carruth
2018-08-16
1
-3
/
+3
*
[MC] Remove PhysRegSize from MCRegisterClass
Bjorn Pettersson
2018-08-09
1
-2
/
+1
*
[CodeGen] Use RegUnits to track register aliases (NFC)
Jun Bum Lim
2018-04-27
1
-27
/
+0
*
[CodeGen] Add a new pass for PostRA sink
Jun Bum Lim
2018-03-22
1
-0
/
+27
*
[AMDGPU][X86][Mips] Make sure renamable bit not set for reserved regs
Geoff Berry
2018-01-29
1
-0
/
+14
*
PeepholeOptimizer: Fix for vregs without defs
Matthias Braun
2018-01-11
1
-0
/
+6
*
Fix a bunch more layering of CodeGen headers that are in Target
David Blaikie
2017-11-17
1
-2
/
+2
*
Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering
David Blaikie
2017-11-08
1
-2
/
+2
*
Move TargetFrameLowering.h to CodeGen where it's implemented
David Blaikie
2017-11-03
1
-1
/
+1
*
CodeGen: Minor cleanups to use MachineInstr::getMF. NFC
Justin Bogner
2017-10-10
1
-6
/
+6
*
use range-for-loops; NFCI
Sanjay Patel
2017-10-02
1
-9
/
+8
*
remove duplicate comments, reposition related functions; NFC
Sanjay Patel
2017-10-02
1
-56
/
+49
*
Teach TargetInstrInfo::getInlineAsmLength to parse .space directives with int...
Alex Bradbury
2017-09-28
1
-10
/
+32
*
TargetInstrInfo: Change duplicate() to work on bundles.
Matthias Braun
2017-08-22
1
-3
/
+4
*
Move size and alignment information of regclass to TargetRegisterInfo
Krzysztof Parzyszek
2017-04-24
1
-4
/
+4
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