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path: root/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp
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* Do not delete identity insert_subreg even if dest is virtual. Let later ↵Evan Cheng2009-10-251-20/+27
| | | | | | passes delete them. This avoids register scavenger complain. llvm-svn: 85045
* Rename isLoopExit to isLoopExiting, for consistency with the wordingDan Gohman2009-10-241-2/+2
| | | | | | | | used elsewhere - an exit block is a block outside the loop branched to from within the loop. An exiting block is a block inside the loop that branches out. llvm-svn: 85019
* Identity copies should not contribute to spill weight.Evan Cheng2009-10-231-2/+5
| | | | llvm-svn: 84978
* Factor out LiveIntervalAnalysis' code to determine whether an instructionDan Gohman2009-10-091-2/+5
| | | | | | | | | | | | | | is trivially rematerializable and integrate it into TargetInstrInfo::isTriviallyReMaterializable. This way, all places that need to know whether an instruction is rematerializable will get the same answer. This enables the useful parts of the aggressive-remat option by default -- using AliasAnalysis to determine whether a memory location is invariant, and removes the questionable parts -- rematting operations with virtual register inputs that may not be live everywhere. llvm-svn: 83687
* isTriviallyReMaterializable checks theDan Gohman2009-10-091-2/+1
| | | | | | | TargetInstrDesc::isRematerializable flag, so it isn't necessary to do this check in its callers. llvm-svn: 83671
* Oops. Renamed remaining MachineInstrIndex references.Lang Hames2009-10-031-3/+3
| | | | llvm-svn: 83255
* Renamed MachineInstrIndex to LiveIndex.Lang Hames2009-10-031-45/+45
| | | | llvm-svn: 83254
* Coalescer should not delete extract_subreg, insert_subreg, and subreg_to_reg ofEvan Cheng2009-09-281-3/+16
| | | | | | | | | | | physical registers. This is especially critical for the later two since they start the live interval of a super-register. e.g. %DO<def> = INSERT_SUBREG %D0<undef>, %S0<kill>, 1 If this instruction is eliminated, the register scavenger will not be happy as D0 is not defined previously. This fixes PR5055. llvm-svn: 82968
* Clean up LiveVariables and change how it deals with partial updates and ↵Evan Cheng2009-09-241-2/+13
| | | | | | kills. This also eliminate the horrible check which scan forward to the end of the basic block. It should be faster and more accurate. llvm-svn: 82676
* Fix a obvious logic error.Evan Cheng2009-09-231-15/+15
| | | | llvm-svn: 82610
* Fix a pasto. Also simplify for Bill's benefit.Evan Cheng2009-09-221-2/+4
| | | | llvm-svn: 82505
* Clean up spill weight computation. Also some changes to give loop inductionEvan Cheng2009-09-211-54/+94
| | | | | | | | | | variable increment / decrement slighter high priority. This has major impact on some micro-benchmarks. On MultiSource/Applications and spec tests, it's a minor win. It also reduce 256.bzip instruction count by 8%, 55 on 164.gzip on i386 / Darwin. llvm-svn: 82485
* Fix this assertion string to mention subreg_to_reg.Dan Gohman2009-09-211-2/+2
| | | | llvm-svn: 82455
* Tabs -> spaces, and remove trailing whitespace.Daniel Dunbar2009-09-201-67/+67
| | | | llvm-svn: 82355
* Fix PR4910: Broken logic in coalescer means when a physical register ↵Evan Cheng2009-09-171-3/+4
| | | | | | liveness is being shortened, the sub-registers were not. The symptom is the register allocator could not find a free register for this particular test. llvm-svn: 82108
* Remove -new-coalescer-heuristic. It's not useful.Evan Cheng2009-09-121-127/+19
| | | | llvm-svn: 81600
* When remat'ing and destination virtual register has a sub-register index. ↵Evan Cheng2009-09-081-0/+16
| | | | | | Make sure the sub-register class matches the register class of the remat'ed instruction definition register class. llvm-svn: 81204
* Replaces uses of unsigned for indexes in LiveInterval and VNInfo withLang Hames2009-09-041-77/+94
| | | | | | | | a new class, MachineInstrIndex, which hides arithmetic details from most clients. This is a step towards allowing the register allocator to update/insert code during allocation. llvm-svn: 81040
* remove some uses of llvm/Support/Streams.hChris Lattner2009-08-231-2/+2
| | | | llvm-svn: 79842
* Change Pass::print to take a raw ostream instead of std::ostream,Chris Lattner2009-08-231-1/+1
| | | | | | update all code that this affects. llvm-svn: 79830
* Convert DOUT to DEBUG(errs()...).Bill Wendling2009-08-221-59/+95
| | | | llvm-svn: 79765
* Modified VNInfo. The "copy" member is now a union which holds the copy for a ↵Lang Hames2009-08-101-15/+15
| | | | | | register interval, or the defining register for a stack interval. Access is via getCopy/setCopy and getReg/setReg. llvm-svn: 78620
* Another coalescer bug. When a dead copy is eliminated, transfer the kill to ↵Evan Cheng2009-08-071-5/+6
| | | | | | a def of the exact register rather than a super-register. llvm-svn: 78376
* Rename a variable to make MSVC happy.Benjamin Kramer2009-08-051-3/+3
| | | | llvm-svn: 78202
* Another nasty coalescer bug (is there another kind):Evan Cheng2009-08-051-5/+19
| | | | | | | | | | | | | | | | After coalescing reg1027's def and kill are both at the same point: %reg1027,0.000000e+00 = [56,814:0) 0@70-(814) bb5: 60 %reg1027<def> = t2MOVr %reg1027, 14, %reg0, %reg0 68 %reg1027<def> = t2LDRi12 %reg1027<kill>, 8, 14, %reg0 76 t2CMPzri %reg1038<kill,undef>, 0, 14, %reg0, %CPSR<imp-def> 84 %reg1027<def> = t2MOVr %reg1027, 14, %reg0, %reg0 96 t2Bcc mbb<bb5,0x2030910>, 1, %CPSR<kill> Do not remove the kill marker on t2LDRi12. llvm-svn: 78178
* Fix a coaelescer bug. If a copy val# is extended to eliminate a ↵Evan Cheng2009-08-031-1/+8
| | | | | | non-trivially coalesced copy, and the copy kills its source register. Trim the source register's live range to the last use if possible. This fixes up kill marker to make the scavenger happy. llvm-svn: 77967
* Use setPreservesAll and setPreservesCFG in CodeGen passes.Dan Gohman2009-07-311-0/+1
| | | | llvm-svn: 77754
* inline the global 'getInstrOperandRegClass' function into its callersChris Lattner2009-07-291-1/+1
| | | | | | now that TargetOperandInfo does the heavy lifting. llvm-svn: 77508
* Avoid build warnings.Mike Stump2009-07-271-0/+1
| | | | llvm-svn: 77271
* More migration to raw_ostream, the water has dried up around the iostream hole.Daniel Dunbar2009-07-251-13/+14
| | | | | | | | | | - Some clients which used DOUT have moved to DEBUG. We are deprecating the "magic" DOUT behavior which avoided calling printing functions when the statement was disabled. In addition to being unnecessary magic, it had the downside of leaving code in -Asserts builds, and of hiding potentially unnecessary computations. llvm-svn: 77019
* Make some changes suggested by Bill and Evan.David Greene2009-07-221-17/+1
| | | | llvm-svn: 76775
* Add some support for iterative coalescers to calculate a joined liveDavid Greene2009-07-211-1/+18
| | | | | | | | | | range's weight properly. This is turned off right now in the sense that you'll get an assert if you get into a situation that can only be caused by an iterative coalescer. All other code paths operate exactly as before so there is no functional change with this patch. The asserts should be disabled if/when an iterative coalescer gets added to trunk. llvm-svn: 76680
* Cross RC coalescing is now on by default.Evan Cheng2009-07-211-4/+4
| | | | llvm-svn: 76519
* Fix some sub-reg coalescing bugs where the coalescer wasn't updating the ↵Evan Cheng2009-07-201-12/+18
| | | | | | resulting interval's register class. llvm-svn: 76458
* Catch more coalescing opportunities.Evan Cheng2009-07-181-4/+7
| | | | llvm-svn: 76282
* Enable cross register class coalescing.Evan Cheng2009-07-181-10/+21
| | | | llvm-svn: 76281
* Simplify some more.Evan Cheng2009-07-171-74/+5
| | | | llvm-svn: 76239
* Simplify the coalescer (finally!) by making ↵Evan Cheng2009-07-171-122/+2
| | | | | | LiveIntervals::processImplicitDefs a little more aggressive and teaching liveintervals to make use of isUndef marker on MachineOperands. llvm-svn: 76223
* Let callers decide the sub-register index on the def operand of ↵Evan Cheng2009-07-161-7/+8
| | | | | | | | rematerialized instructions. Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right. llvm-svn: 75900
* ShortenDeadCopySrcLiveRange needs to be more conservative in multi-kill ↵Evan Cheng2009-07-151-1/+6
| | | | | | situations. llvm-svn: 75838
* llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Torok Edwin2009-07-141-2/+2
| | | | | | | | | This adds location info for all llvm_unreachable calls (which is a macro now) in !NDEBUG builds. In NDEBUG builds location info and the message is off (it only prints "UREACHABLE executed"). llvm-svn: 75640
* Fix pr4544. When remating, make sure the destination register fits the ↵Evan Cheng2009-07-141-0/+11
| | | | | | | | instruction definition. It may be mismatched due to sub-register coalescing. No test case yet because the code doesn't trigger until 75408 is re-applied. llvm-svn: 75572
* assert(0) -> LLVM_UNREACHABLE.Torok Edwin2009-07-111-3/+3
| | | | | | | | | Make llvm_unreachable take an optional string, thus moving the cerr<< out of line. LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for NDEBUG builds. llvm-svn: 75379
* Remove TargetInstrInfo::CommuteChangesDestination and added ↵Evan Cheng2009-07-101-3/+17
| | | | | | findCommutedOpIndices which returns the operand indices which are swapped (when applicable). This allows for some code clean up and future enhancements. llvm-svn: 75264
* Improved tracking of value number kills. VN kills are now representedLang Hames2009-07-091-9/+7
| | | | | | | | | | | | as an (index,bool) pair. The bool flag records whether the kill is a PHI kill or not. This code will be used to enable splitting of live intervals containing PHI-kills. A slight change to live interval weights introduced an extra spill into lsr-code-insertion (outside the critical sections). The test condition has been updated to reflect this. llvm-svn: 75097
* Remove special handling of implicit_def. Fix a couple more bugs in ↵Evan Cheng2009-07-011-5/+14
| | | | | | | | liveintervalanalysis and coalescer handling of implicit_def. Note, isUndef marker must be placed even on implicit_def def operand or else the scavenger will not ignore it. This is necessary because -O0 path does not use liveintervalanalysis, it treats implicit_def just like any other def. llvm-svn: 74601
* Fix another register coalescer crash: forgot to check if the instruction ↵Evan Cheng2009-06-221-3/+7
| | | | | | being updated has already been coalesced. llvm-svn: 73898
* - Update register allocation hint after coalescing. This is done by the ↵Evan Cheng2009-06-181-0/+3
| | | | | | | | | target since the hint is target dependent. This is important for ARM register pair hints. - Register allocator should resolve the second part of the hint (register number) before passing it to the target since it knows virtual register to physical register mapping. - More fixes to get ARM load / store double word working. llvm-svn: 73671
* VNInfo cleanup.Lang Hames2009-06-171-22/+32
| | | | llvm-svn: 73634
* Rename RemoveCopiesFromValNo to TurnCopiesFromValNoToImpDefs.Evan Cheng2009-06-161-6/+6
| | | | llvm-svn: 73479
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