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authorEvan Cheng <evan.cheng@apple.com>2009-06-18 02:04:01 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-06-18 02:04:01 +0000
commit0e79603588589f8f8259c828c1fb82d410318639 (patch)
tree1729359acc73e4ac9866ff7f647ece0d976a5380 /llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp
parent6a667ab710b192430688e45c76a86d0728db11d9 (diff)
downloadbcm5719-llvm-0e79603588589f8f8259c828c1fb82d410318639.tar.gz
bcm5719-llvm-0e79603588589f8f8259c828c1fb82d410318639.zip
- Update register allocation hint after coalescing. This is done by the target since the hint is target dependent. This is important for ARM register pair hints.
- Register allocator should resolve the second part of the hint (register number) before passing it to the target since it knows virtual register to physical register mapping. - More fixes to get ARM load / store double word working. llvm-svn: 73671
Diffstat (limited to 'llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp')
-rw-r--r--llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp3
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp
index c363ba52b5e..20348055bd9 100644
--- a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp
+++ b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp
@@ -1766,6 +1766,9 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
// being merged.
li_->removeInterval(SrcReg);
+ // Update regalloc hint.
+ tri_->UpdateRegAllocHint(SrcReg, DstReg, *mf_);
+
// Manually deleted the live interval copy.
if (SavedLI) {
SavedLI->clear();
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