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* This is possible:Evan Cheng2008-02-261-2/+8
| | | | | | | | | vr1 = extract_subreg vr2, 3 ... vr3 = extract_subreg vr1, 2 The end result is vr3 is equal to vr2 with subidx 2. llvm-svn: 47592
* Fix compiler warning.Evan Cheng2008-02-221-1/+1
| | | | llvm-svn: 47468
* Help testing.Evan Cheng2008-02-211-0/+7
| | | | llvm-svn: 47448
* - Remove the previous check which broke coalescer-commute3.llEvan Cheng2008-02-181-5/+5
| | | | | | - For now, conservatively ignore copy MI whose source is a physical register. Commuting its def MI can cause a physical register live interval to be live through a loop (since we know it's live coming into the def MI). llvm-svn: 47281
* For now, avoid commuting def MI for copy MI's whose source is not killed. ↵Evan Cheng2008-02-181-0/+7
| | | | | | That simply trade a live interval for another and because only the non-two-address operands can be folded into loads, may end up pessimising code. llvm-svn: 47262
* Refactor some code; check if commuteInstruction is able to commute the ↵Evan Cheng2008-02-161-17/+29
| | | | | | instruction. llvm-svn: 47208
* The copy instruction being coalesced will be removed, it is not a kill.Evan Cheng2008-02-151-2/+2
| | | | llvm-svn: 47179
* - Removing the infamous r2rMap_ and rep() method. Now the coalescer will updateEvan Cheng2008-02-151-311/+215
| | | | | | | register defs and uses after each successful coalescing. - Also removed a number of hacks and fixed some subtle kill information bugs. llvm-svn: 47167
* Some code clean up.Evan Cheng2008-02-131-33/+34
| | | | llvm-svn: 47060
* * Cannot safely commute an instruction there are other defs which can reach ↵Evan Cheng2008-02-131-1/+5
| | | | | | | | its uses. * Ignore copy instructions which have already been coalesced. llvm-svn: 47056
* Initial support for copy elimination by commuting its definition MI.Evan Cheng2008-02-131-16/+235
| | | | | | | | | | | | | | | | | | | | | PR1877. A3 = op A2 B0<kill> ... B1 = A3 <- this copy ... = op A3 <- more uses ==> B2 = op B0 A2<kill> ... B1 = B2 <- now an identify copy ... = op B2 <- more uses This speeds up FreeBench/neural by 29%, Olden/bh by 12%, oopack_v1p8 by 53%. llvm-svn: 47046
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-64/+64
| | | | llvm-svn: 46930
* Remove unused hidden option.Evan Cheng2008-02-091-6/+1
| | | | llvm-svn: 46903
* Don't recalculate the loop info and loop dominators analyses if they'reBill Wendling2008-01-041-0/+2
| | | | | | preserved. llvm-svn: 45596
* 80-column violations.Bill Wendling2008-01-041-10/+14
| | | | llvm-svn: 45574
* update a couple of references to SSARegMap.Chris Lattner2007-12-311-2/+2
| | | | llvm-svn: 45468
* Rename SSARegMap -> MachineRegisterInfo in keeping with the idea Chris Lattner2007-12-311-14/+13
| | | | | | | | | | | | | | that "machine" classes are used to represent the current state of the code being compiled. Given this expanded name, we can start moving other stuff into it. For now, move the UsedPhysRegs and LiveIn/LoveOuts vectors from MachineFunction into it. Update all the clients to match. This also reduces some needless #includes, such as MachineModuleInfo from MachineFunction. llvm-svn: 45467
* More cleanups for MachineOperand:Chris Lattner2007-12-301-3/+3
| | | | | | | | | | - Eliminate the static "print" method for operands, moving it into MachineOperand::print. - Change various set* methods for register flags to take a bool for the value to set it to. Remove unset* methods. - Group methods more logically by operand flavor in MachineOperand.h llvm-svn: 45461
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* The physical register + virtual register joining requirement was much too ↵Evan Cheng2007-12-201-1/+1
| | | | | | strict. llvm-svn: 45253
* Switch over to MachineLoopInfo.Evan Cheng2007-12-111-13/+12
| | | | llvm-svn: 44838
* Add an option to control this heuristic tweak so I can test it.Evan Cheng2007-12-071-1/+6
| | | | llvm-svn: 44671
* Fix for PR1831: if all defs of an interval are re-materializable, then it's ↵Evan Cheng2007-12-061-0/+14
| | | | | | a preferred spill candiate. llvm-svn: 44644
* Replace the odd kill# hack with something less fragile.Evan Cheng2007-11-291-0/+4
| | | | llvm-svn: 44434
* Live interval splitting:Evan Cheng2007-11-171-1/+2
| | | | | | | | | | | | | | | | | | | When a live interval is being spilled, rather than creating short, non-spillable intervals for every def / use, split the interval at BB boundaries. That is, for every BB where the live interval is defined or used, create a new interval that covers all the defs and uses in the BB. This is designed to eliminate one common problem: multiple reloads of the same value in a single basic block. Note, it does *not* decrease the number of spills since no copies are inserted so the split intervals are *connected* through spill and reloads (or rematerialization). The newly created intervals can be spilled again, in that case, since it does not span multiple basic blocks, it's spilled in the usual manner. However, it can reuse the same stack slot as the previously split interval. This is currently controlled by -split-intervals-at-bb. llvm-svn: 44198
* Clean up sub-register implementation by moving subReg information back toEvan Cheng2007-11-141-6/+9
| | | | | | | | | | | MachineOperand auxInfo. Previous clunky implementation uses an external map to track sub-register uses. That works because register allocator uses a new virtual register for each spilled use. With interval splitting (coming soon), we may have multiple uses of the same register some of which are of using different sub-registers from others. It's too fragile to constantly update the information. llvm-svn: 44104
* Refactor some code.Evan Cheng2007-11-121-2/+1
| | | | llvm-svn: 44010
* First step towards moving the coalescer to priority_queue based machinery.Evan Cheng2007-11-061-34/+181
| | | | llvm-svn: 43764
* Move SimpleRegisterCoalescing.h to lib/CodeGen since there is now a commonEvan Cheng2007-11-051-2/+2
| | | | | | register coalescer interface: RegisterCoalescing. llvm-svn: 43714
* Skip over deleted val#'s.Evan Cheng2007-11-051-2/+2
| | | | llvm-svn: 43700
* - Coalesce extract_subreg when both intervals are relatively small.Evan Cheng2007-11-011-23/+46
| | | | | | - Some code clean up. llvm-svn: 43606
* Really fix PR1734. Carefully track which register uses are sub-register uses byEvan Cheng2007-10-181-8/+25
| | | | | | traversing inverse register coalescing map. llvm-svn: 43118
* One more extract_subreg coalescing bug fix.Evan Cheng2007-10-171-1/+1
| | | | llvm-svn: 43065
* Fix PR1734.Evan Cheng2007-10-161-1/+1
| | | | llvm-svn: 43035
* Code clean up.Evan Cheng2007-10-161-13/+27
| | | | llvm-svn: 43026
* Fix PR1729: watch out for val# with no def.Evan Cheng2007-10-151-8/+13
| | | | llvm-svn: 42996
* When coalescing an EXTRACT_SUBREG and the dst register is a physical register,Evan Cheng2007-10-141-25/+27
| | | | | | | | the source register will be coalesced to the super register of the LHS. Properly merge in the live ranges of the resulting coalesced interval that were part of the original source interval to the live interval of the super-register. llvm-svn: 42961
* Restrict EXTRACT_SUBREG coalescing to avoid negative performance impact.Evan Cheng2007-10-121-1/+6
| | | | llvm-svn: 42903
* EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG likeEvan Cheng2007-10-121-17/+106
| | | | | | | | | (almost) a register copy. However, it always coalesced to the register of the RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub- register uses which adds subtle complications to load folding, spiller rewrite, etc. llvm-svn: 42899
* Bad choice of variable name.Evan Cheng2007-10-101-2/+2
| | | | llvm-svn: 42821
* Fix an extremely stupid bug that prevented first round of coalescing ↵Evan Cheng2007-10-091-1/+2
| | | | | | (physical registers only) from happening. llvm-svn: 42820
* Remove isReg, isImm, and isMBB, and change all their users to use Dan Gohman2007-09-141-5/+5
| | | | | | | isRegister, isImmediate, and isMachineBasicBlock, which are equivalent, and more popular. llvm-svn: 41958
* Pluggable coalescers inplementation.David Greene2007-09-061-0/+11
| | | | llvm-svn: 41743
* Use pool allocator for all the VNInfo's to improve memory access locality. ↵Evan Cheng2007-09-051-9/+10
| | | | | | This reduces coalescing time on siod Mac OS X PPC by 35%. Also remove the back ptr from VNInfo to LiveInterval and other tweaks. llvm-svn: 41729
* More tweaks to improve compile time.Evan Cheng2007-09-011-19/+21
| | | | llvm-svn: 41669
* std::map -> DenseMap for slight compile time benefit.Evan Cheng2007-08-311-7/+7
| | | | llvm-svn: 41650
* Use std::map instead of a (potentially very sparse) array to track val# ↵Evan Cheng2007-08-311-36/+27
| | | | | | defined by copy from the other live range. Minor compile time win when number of val# is large. llvm-svn: 41640
* Change LiveRange so it keeps a pointer to the VNInfo rather than an index.Evan Cheng2007-08-291-110/+118
| | | | | | | Changes related modules so VNInfo's are not copied. This decrease copy coalescing time by 45% and overall compilation time by 10% on siod. llvm-svn: 41579
* Recover most of the compile time regression due to recent live interval changes.Evan Cheng2007-08-281-17/+27
| | | | | | | | 1. Eliminate the costly live interval "swapping". 2. Change ValueNumberInfo container from SmallVector to std::vector. The former performs slowly when the vector size is very large. llvm-svn: 41536
* Fix some kill info update bugs; add hidden option -disable-rematerialization ↵Evan Cheng2007-08-161-0/+6
| | | | | | to turn off remat for debugging. llvm-svn: 41118
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