Clean up sub-register implementation by moving subReg information back to

MachineOperand auxInfo. Previous clunky implementation uses an external map
to track sub-register uses. That works because register allocator uses
a new virtual register for each spilled use. With interval splitting (coming
soon), we may have multiple uses of the same register some of which are
of using different sub-registers from others. It's too fragile to constantly
update the information.

llvm-svn: 44104

1 files changed, 9 insertions, 6 deletions

diff --git a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp
index 623d2951d09..b919e8a80ba 100644
--- a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp
+++ b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp
@@ -1387,6 +1387,7 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) {
   r2rRevMap_.grow(RegMap->getLastVirtReg());
 
   // Join (coalesce) intervals if requested.
+  IndexedMap<unsigned, VirtReg2IndexFunctor> RegSubIdxMap;
   if (EnableJoining) {
     joinIntervals();
     DOUT << "********** INTERVALS POST JOINING **********\n";
@@ -1404,10 +1405,11 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) {
 
     // Transfer sub-registers info to SSARegMap now that coalescing information
     // is complete.
+    RegSubIdxMap.grow(mf_->getSSARegMap()->getLastVirtReg()+1);
     while (!SubRegIdxes.empty()) {
       std::pair<unsigned, unsigned> RI = SubRegIdxes.back();
       SubRegIdxes.pop_back();
-      mf_->getSSARegMap()->setIsSubRegister(RI.first, rep(RI.first), RI.second);
+      RegSubIdxMap[RI.first] = RI.second;
     }
   }
 
@@ -1448,12 +1450,13 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) {
             // replace register with representative register
             unsigned OrigReg = mop.getReg();
             unsigned reg = rep(OrigReg);
-            // Don't rewrite if it is a sub-register of a virtual register.
-            if (!RegMap->isSubRegister(OrigReg))
+            unsigned SubIdx = RegSubIdxMap[OrigReg];
+            if (SubIdx && MRegisterInfo::isPhysicalRegister(reg))
+              mii->getOperand(i).setReg(mri_->getSubReg(reg, SubIdx));
+            else {
               mii->getOperand(i).setReg(reg);
-            else if (MRegisterInfo::isPhysicalRegister(reg))
-              mii->getOperand(i).setReg(mri_->getSubReg(reg,
-                                         RegMap->getSubRegisterIndex(OrigReg)));
+              mii->getOperand(i).setSubReg(SubIdx);
+            }
 
             // Multiple uses of reg by the same instruction. It should not
             // contribute to spill weight again.