summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/SelectionDAG
Commit message (Collapse)AuthorAgeFilesLines
* Fix comments to reflect renaming elsewhere.Dale Johannesen2010-02-101-1/+1
| | | | llvm-svn: 95730
* Only dump output in debug mode.David Greene2010-02-091-4/+5
| | | | llvm-svn: 95711
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-096-37/+36
| | | | | | | | | into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. llvm-svn: 95687
* Apply the 95471 fix to SelectionDAGBuilder as well;Dale Johannesen2010-02-081-0/+2
| | | | | | | we can get in here if FastISel gives up in a block. (Actually the two copies of this need to be unified. Later.) llvm-svn: 95579
* In guaranteed tailcall mode, don't decline the tailcall optimizationDan Gohman2010-02-081-7/+10
| | | | | | for blocks ending in "unreachable". llvm-svn: 95565
* After Victor's latest commits I am seeing nullDale Johannesen2010-02-061-0/+2
| | | | | | | addresses in dbg.declare; ignore this for the moment to prevent things from breaking. llvm-svn: 95471
* When the scheduler unfold a load folding instruction it move some of the ↵Evan Cheng2010-02-051-2/+10
| | | | | | | | predecessors to the unfolded load. It decides what gets moved to the load by checking whether the new load is using the predecessor as an operand. The check neglects the cases whether the predecessor is a flagged scheduling unit. rdar://7604000 llvm-svn: 95339
* Fix typo Duncan noticed.Evan Cheng2010-02-041-1/+1
| | | | llvm-svn: 95322
* It's too risky to eliminate sext / zext of call results for tail call ↵Evan Cheng2010-02-041-6/+4
| | | | | | optimization even if the caller / callee attributes completely match. The callee may have been bitcast'ed (or otherwise lied about what it's doing). llvm-svn: 95282
* Revert 94937 and move the noreturn check to codegen.Evan Cheng2010-02-031-2/+7
| | | | llvm-svn: 95198
* Allow all types of callee's to be tail called. But avoid automatic tailcall ↵Evan Cheng2010-02-031-4/+9
| | | | | | if the callee is a result of bitcast to avoid losing necessary zext / sext etc. llvm-svn: 95195
* Revert 95130.Evan Cheng2010-02-021-1/+1
| | | | llvm-svn: 95160
* Pass callsite return type to TargetLowering::LowerCall and use that to check ↵Evan Cheng2010-02-021-1/+1
| | | | | | sibcall eligibility. llvm-svn: 95130
* Improve EXTRACT_VECTOR_ELT patch based on comments from DuncanMon P Wang2010-02-012-10/+10
| | | | llvm-svn: 95012
* eliminate a bunch of pointless LLVMContext arguments.Chris Lattner2010-02-011-2/+1
| | | | llvm-svn: 95001
* fix PR 6157. Testcase pending.Dale Johannesen2010-02-011-0/+35
| | | | llvm-svn: 94996
* Fixed a couple of optimization with EXTRACT_VECTOR_ELT that assumes the resultMon P Wang2010-02-012-5/+12
| | | | | | | | type is the same as the element type of the vector. EXTRACT_VECTOR_ELT can be used to extended the width of an integer type. This fixes a bug for Generic/vector-casts.ll on a ppc750. llvm-svn: 94990
* Change the SREM case to match the logic in the IR version ComputeMaskedBits.Duncan Sands2010-01-291-8/+17
| | | | llvm-svn: 94805
* Assign the ordering of SDNodes in a much less intrusive fashion. After theBill Wendling2010-01-283-691/+171
| | | | | | | "visit*" method is called, take the newly created nodes, walk them in a DFS fashion, and if they don't have an ordering set, then give it one. llvm-svn: 94757
* Update of 94055 to track the IR level call site information via an intrinsic.Jim Grosbach2010-01-281-0/+19
| | | | | | | This allows code gen and the exception table writer to cooperate to make sure landing pads are associated with the correct invoke locations. llvm-svn: 94726
* Eliminate target hook IsEligibleForTailCallOptimization.Evan Cheng2010-01-271-9/+0
| | | | | | | | | Target independent isel should always pass along the "tail call" property. Change target hook LowerCall's parameter "isTailCall" into a refernce. If the target decides it's impossible to honor the tail call request, it should set isTailCall to false to make target independent isel happy. llvm-svn: 94626
* Allow some automatic tailcall optimization without changing ABI.Evan Cheng2010-01-261-6/+1
| | | | llvm-svn: 94611
* eliminate the TargetLowering::UsesGlobalOffsetTable bool, which isChris Lattner2010-01-261-3/+2
| | | | | | | subsumed by TargetLowering::getJumpTableEncoding(). Change uses of it to be more specific. llvm-svn: 94529
* Move getJTISymbol from MachineJumpTableInfo to MachineFunction,Chris Lattner2010-01-261-4/+4
| | | | | | | | | | | | | | | | | | which is more convenient, and change getPICJumpTableRelocBaseExpr to take a MachineFunction to match. Next, move the X86 code that create a PICBase symbol to X86TargetLowering::getPICBaseSymbol from X86MCInstLower::GetPICBaseSymbol, which was an asmprinter specific library. This eliminates a 'gross hack', and allows us to implement X86ISelLowering::getPICJumpTableRelocBaseExpr which now calls it. This in turn allows us to eliminate the X86AsmPrinter::printPICJumpTableSetLabel method, which was the only overload of printPICJumpTableSetLabel. llvm-svn: 94526
* add a new MachineJumpTableInfo::getJTISymbol method,Chris Lattner2010-01-261-2/+4
| | | | | | use it to implement the default TargetLowering::getPICJumpTableRelocBaseExpr llvm-svn: 94523
* stub out a new target hook, need some refactoring before I canChris Lattner2010-01-261-0/+11
| | | | | | implement it. llvm-svn: 94521
* Implement cond ? -1 : 0 with sbb.Evan Cheng2010-01-261-0/+8
| | | | llvm-svn: 94490
* Generate DEBUG_VALUE comments on x86. The (limited)Dale Johannesen2010-01-261-0/+3
| | | | | | | dbg.declare's we currently generate go through both register allocators without perturbing the results. llvm-svn: 94480
* Rearrange handling of jump tables. Highlights:Chris Lattner2010-01-253-6/+28
| | | | | | | | | | | | | | | | | | 1. MachineJumpTableInfo is now created lazily for a function the first time it actually makes a jump table instead of for every function. 2. The encoding of jump table entries is now described by the MachineJumpTableInfo::JTEntryKind enum. This enum is determined by the TLI::getJumpTableEncoding() hook, instead of by lots of code scattered throughout the compiler that "knows" that jump table entries are always 32-bits in pic mode (for example). 3. The size and alignment of jump table entries is now calculated based on their kind, instead of at machinefunction creation time. Future work includes using the EntryKind in more places in the compiler, eliminating other logic that "knows" the layout of jump tables in various situations. llvm-svn: 94470
* make -fno-rtti the default unless a directory builds with REQUIRES_RTTI.Chris Lattner2010-01-241-1/+0
| | | | llvm-svn: 94378
* It seems better to scalarize vectors of size 1 instead of widening them.Mon P Wang2010-01-243-1/+11
| | | | | | Add support to widen SETCC. llvm-svn: 94342
* Improved widening loads by adding support for wider loads ifMon P Wang2010-01-243-275/+385
| | | | | | | the alignment allows. Fixed a bug where we didn't use a vector load/store for PR5626. llvm-svn: 94338
* Remove the '-disable-scheduling' flag and replace it with the 'source' option ofBill Wendling2010-01-234-690/+444
| | | | | | | | | the '-pre-RA-sched' flag. It actually makes more sense to do it this way. Also, keep track of the SDNode ordering by default. Eventually, we would like to make this ordering a way to break a "tie" in the scheduler. However, doing that now breaks the "CodeGen/X86/abi-isel.ll" test for 32-bit Linux. llvm-svn: 94308
* Enable pre-regalloc scheduling load clustering by default.Evan Cheng2010-01-221-7/+1
| | | | llvm-svn: 94255
* Stop building RTTI information for *most* llvm libraries. NotableChris Lattner2010-01-221-1/+2
| | | | | | | | | | | missing ones are libsupport, libsystem and libvmcore. libvmcore is currently blocked on bugpoint, which uses EH. Once it stops using EH, we can switch it off. This #if 0's out 3 unit tests, because gtest requires RTTI information. Suggestions welcome on how to fix this. llvm-svn: 94164
* Teach pre-regalloc scheduler to schedule loads from nearby addresses. It may ↵Evan Cheng2010-01-222-0/+134
| | | | | | improve cache locality. This is controlled by -cluster-loads for now. llvm-svn: 94148
* Trim unneeded includes.Evan Cheng2010-01-213-3/+0
| | | | llvm-svn: 94105
* back this out for now. Growing Function is not good.Jim Grosbach2010-01-211-6/+0
| | | | llvm-svn: 94097
* Make sure that landing pad entries in the EH call site table are in the properJim Grosbach2010-01-211-0/+6
| | | | | | order for SjLj style exception handling. llvm-svn: 94055
* When XDEBUG is enabled, check for SelectionDAG cycles at some keyDavid Greene2010-01-201-1/+35
| | | | | | | points. This will help us find future problems like the one described in PR6019. llvm-svn: 94019
* Add some asserts to check SelectionDAG problems earlier.David Greene2010-01-201-0/+12
| | | | llvm-svn: 93960
* Fold (add x, shl(0 - y, n)) -> sub(x, shl(y, n)), to simplify some codeDan Gohman2010-01-191-0/+20
| | | | | | that SCEVExpander can produce when running on behalf of LSR. llvm-svn: 93949
* Add some new debugging APIs to print out "raw" SelectionDAGs to makeDavid Greene2010-01-192-29/+25
| | | | | | understanding CannotYTetSelect and other errors easier. llvm-svn: 93901
* Revert 93811 per request.Dale Johannesen2010-01-191-3/+0
| | | | llvm-svn: 93818
* Enable code to emit dbg.declare as DEBUG_VALUEDale Johannesen2010-01-181-0/+3
| | | | | | | | | comments (fast isel, X86). This doesn't seem to break any functionality, but will introduce cases where -g affects the generated code. I'll be fixing that. llvm-svn: 93811
* Canonicalize -1 - x to ~x.Evan Cheng2010-01-181-0/+3
| | | | | | | | | | Instcombine does this but apparently there are situations where this pattern will escape the optimizer and / or created by isel. Here is a case that's seen in JavaScriptCore: %t1 = sub i32 0, %a %t2 = add i32 %t1, -1 The dag combiner pattern: ((c1-A)+c2) -> (c1+c2)-A will fold it to -1 - %a. llvm-svn: 93773
* When checking for sret-demotion, it needs to use legal types. When using ↵Kenneth Uildriks2010-01-161-11/+41
| | | | | | the return value of an sret-demoted call, it needs to use possibly illegal types that match the declared Type of the callee. llvm-svn: 93667
* Add some debug routines to SelectionDAG to dump full DAGs.David Greene2010-01-152-1/+44
| | | | | | | | | | | print/dumpWithDepth allows one to dump a DAG up to N levels deep. dump/printWithFullDepth prints the whole DAG, subject to a depth limit on 100 in the default case (to prevent infinite recursion). Have CannotYetSelect to a dumpWithFullDepth so it is clearer exactly what the non-matching DAG looks like. llvm-svn: 93538
* Improve llvm.dbg.declare intrinsic by referring directly to the storage in ↵Victor Hernandez2010-01-151-2/+0
| | | | | | | | | its first argument, via function-local metadata (instead of via a bitcast). This patch also cleans up code that expects there to be a bitcast in the first argument and testcases that call llvm.dbg.declare. It also strips old llvm.dbg.declare intrinsics that did not pass metadata as the first argument. llvm-svn: 93531
* Revert r93504 because older uses of llvm.dbg.declare intrinsics need to be ↵Victor Hernandez2010-01-151-0/+2
| | | | | | auto-upgraded llvm-svn: 93515
OpenPOWER on IntegriCloud