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* Make SelectionDAG::getVectorShuffle work properly for VECTOR_SHUFFLEDan Gohman2009-07-091-2/+2
| | | | | | | | nodes with operand types that differ from the result type. (This doesn't normally happen right now, because SelectionDAGLowering::visitShuffleVector normalizes vector shuffles.) llvm-svn: 75081
* Use common code for both ARM and Thumb-2 instruction and register info.David Goodwin2009-07-081-4/+9
| | | | llvm-svn: 75067
* Nowadays vectors are only split if they have an evenDuncan Sands2009-07-084-59/+47
| | | | | | | | number of elements. Make some simplifications based on this (in particular SplitVecRes_SETCC). Tighten up some checking while there. llvm-svn: 75050
* Remove trailing whitespace. Reorder some methodsDuncan Sands2009-07-085-59/+60
| | | | | | and cases alphabetically. No functionality change. llvm-svn: 75001
* Remove the vicmp and vfcmp instructions. Because we never had a release withNick Lewycky2009-07-082-31/+0
| | | | | | | these instructions, no autoupgrade or backwards compatibility support is provided. llvm-svn: 74991
* dag combine sext(setcc) -> vsetcc before legalize. To make this safe,Chris Lattner2009-07-081-1/+19
| | | | | | | | | VSETCC must define all bits, which is different than it was documented to before. Since all targets that implement VSETCC already have this behavior, and we don't optimize based on this, just change the documentation. We now get nice code for vec_compare.ll llvm-svn: 74978
* SelectionDAG::SignBitIsZero doesn't work right for vectors,Chris Lattner2009-07-071-0/+4
| | | | | | for now, conservatively return false. llvm-svn: 74969
* Operand of asm("call") (the callee function) is representedDale Johannesen2009-07-071-3/+16
| | | | | | | | | | as "X" constraint and "P" modifier on x86. Make this work. (Change may not be sufficient to fix it for non-Darwin, but I'm pretty sure it won't break anything.) gcc.apple/asm-block-32.c gcc.apple/asm-block-33.c llvm-svn: 74967
* add support for legalizing an icmp where the result is illegal (4xi1) butChris Lattner2009-07-071-7/+30
| | | | | | the input is legal (4 x i32) llvm-svn: 74964
* random code cleanups.Chris Lattner2009-07-071-27/+28
| | | | llvm-svn: 74962
* implement support for spliting and scalarizing vector setcc's. ThisChris Lattner2009-07-072-9/+24
| | | | | | | finishes off enough support for vector compares to get the icmp/fcmp version of 2008-07-23-VSetCC.ll passing. llvm-svn: 74961
* lower vector icmp/fcmp to ICMP/FCMP nodes with the right resultChris Lattner2009-07-071-2/+5
| | | | | | (vector of bool). llvm-svn: 74960
* ScalarizeVecRes_ShiftOp and ScalarizeVecRes_BinOp are the same,Chris Lattner2009-07-072-12/+1
| | | | | | eliminate the former. llvm-svn: 74959
* add support for vector legalizing of *_EXTEND.Chris Lattner2009-07-071-15/+50
| | | | llvm-svn: 74957
* Have scoped mutexes take referenes instead of pointers.Owen Anderson2009-07-071-1/+1
| | | | llvm-svn: 74931
* Add NumFixedArgs attribute to CallSDNode which indicates the number of fixed ↵Tilmann Scheller2009-07-034-13/+14
| | | | | | | | | | | arguments in a vararg call. With the SVR4 ABI on PowerPC, vector arguments for vararg calls are passed differently depending on whether they are a fixed or a variable argument. Variable vector arguments always go into memory, fixed vector arguments are put into vector registers. If there are no free vector registers available, fixed vector arguments are put on the stack. The NumFixedArgs attribute allows to decide for an argument in a vararg call whether it belongs to the fixed or variable portion of the parameter list. llvm-svn: 74764
* Simplify debug info intrisinc lowering.Devang Patel2009-07-022-162/+115
| | | | llvm-svn: 74733
* CMake build fixes, from Xerxes RanbyDouglas Gregor2009-07-021-0/+2
| | | | llvm-svn: 74720
* Simplify. Devang Patel2009-07-022-17/+17
| | | | llvm-svn: 74677
* Simplify. No intentional functionality change.Devang Patel2009-07-021-49/+36
| | | | llvm-svn: 74673
* Refactor. No functionality change.Devang Patel2009-07-011-10/+4
| | | | llvm-svn: 74659
* llvm.dbg.declare is always used for local variable's debug info.Devang Patel2009-07-011-4/+1
| | | | llvm-svn: 74625
* Add a bit IsUndef to MachineOperand. This indicates the def / use register ↵Evan Cheng2009-06-301-1/+1
| | | | | | | | | | operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them. The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing. This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def. llvm-svn: 74518
* fix a typo that GCC should have caught that causes crashes with -view-*-dagsChris Lattner2009-06-271-1/+1
| | | | llvm-svn: 74364
* fix a really subtle bug in the cross section of aliases and TLS:Chris Lattner2009-06-261-9/+3
| | | | | | | | | | | the SelectionDAG::getGlobalAddress function properly looks through aliases to determine thread-localness, but then passes the GV* down to GlobalAddressSDNode::GlobalAddressSDNode which does not. Instead of passing down isTarget, just pass down the predetermined node opcode. This fixes some assertions with out of tree changes I'm working on. llvm-svn: 74325
* implement DOTGraphTraits<SelectionDAG*>::getNodeLabel in terms ofChris Lattner2009-06-261-138/+5
| | | | | | SDNode::print_details to eliminate a ton of near-duplicate code. llvm-svn: 74311
* dot graph viewing is apparently not using SDNode::print_details, this is bad,Chris Lattner2009-06-261-0/+7
| | | | | | but in the meantime lets print targetflags on node labels. llvm-svn: 74274
* propagate target operand flags from dag nodes into MachineOperands.Chris Lattner2009-06-261-4/+8
| | | | llvm-svn: 74273
* fit in 80 colsChris Lattner2009-06-261-5/+4
| | | | llvm-svn: 74270
* add targetflags to jump tables and constant pool entries.Chris Lattner2009-06-251-6/+24
| | | | llvm-svn: 74204
* allow setting target operand flags on TargetGlobalAddress nodes.Chris Lattner2009-06-251-6/+19
| | | | llvm-svn: 74203
* start bringing targetoperand flags into isel, first up, ExternalSymbol.Chris Lattner2009-06-251-7/+13
| | | | llvm-svn: 74199
* Provide guards for this shared structure. I'm not sure this actually needsOwen Anderson2009-06-251-3/+8
| | | | | | | | to be shared, but how/where to privatize it is not immediately clear to me. If any SelectionDAG experts see a better solution, please share! llvm-svn: 74180
* This increases the maximum for MVT::LAST_VALUETYPEDavid Greene2009-06-243-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | This change doubles the allowable value for MVT::LAST_VALUETYPE. It does this by doing several things. 1. Introduces MVT::MAX_ALLOWED_LAST_VALUETYPE which in this change has a value of 64. This value contains the current maximum for the MVT::LAST_VALUETYPE. 2. Instead of checking "MVT::LAST_VALUETYPE <= 32", all of those uses now become "MVT::LAST_VALUETYPE <= MVT::MAX_ALLOWED_LAST_VALUETYPE" 3. Changes the dimension of the ValueTypeActions from 2 elements to four elements and adds comments ahead of the declaration indicating the it is "(MVT::MAX_ALLOWED_LAST_VALUETYPE/32) * 2". This at least lets us find what is affected if and when MVT::MAX_ALLOWED_LAST_VALUETYPE gets changed. 4. Adds initializers for the new elements of ValueTypeActions. This does NOT add any types in MVT. That would be done separately. This doubles the size of ValueTypeActions from 64 bits to 128 bits and gives us the freedom to add more types for AVX. llvm-svn: 74110
* Get rid of the global CFGOnly flag by threading a ShortNames parameters ↵Owen Anderson2009-06-241-4/+7
| | | | | | | | through the GraphViz rendering code. Update other uses in the codebase for this change. llvm-svn: 74084
* Rewrite 73900 per Duncan's suggestion.Dale Johannesen2009-06-241-19/+9
| | | | llvm-svn: 74082
* remove dead makefile flags.Chris Lattner2009-06-241-2/+0
| | | | llvm-svn: 74065
* Fix memcpy expansion so it won't generate invalidDale Johannesen2009-06-221-6/+25
| | | | | | | types for the target (I think). This was breaking the PPC32 calling sequence. llvm-svn: 73900
* mv CodeGen/DebugLoc.h Support/DebugLoc.hDevang Patel2009-06-191-1/+0
| | | | llvm-svn: 73786
* Minor cleanup; fixes review comments for a previous patch. Sorry for Eli Friedman2009-06-191-4/+3
| | | | | | taking so long to get to this! llvm-svn: 73757
* Fixed names of libcalls checked in r73480.Sanjiv Gupta2009-06-161-8/+4
| | | | llvm-svn: 73483
* Added required libcalls for PIC16 (mostly floating points to integer casting ↵Sanjiv Gupta2009-06-161-0/+16
| | | | | | operations). llvm-svn: 73480
* Add some generic expansion logic for SMULO and UMULO. Fixes UMULO Eli Friedman2009-06-161-0/+47
| | | | | | | | support for x86, and UMULO/SMULO for many architectures, including PPC (PR4201), ARM, and Cell. The resulting expansion isn't perfect, but it's not bad. llvm-svn: 73477
* Change this from an assert to a cerr+exit, since it's diagnosing anDan Gohman2009-06-151-2/+6
| | | | | | unsupported inline asm construct, rather than verifying a code invariant. llvm-svn: 73435
* Gracefully handle imbalanced inline function begin and end markers.Devang Patel2009-06-151-1/+1
| | | | llvm-svn: 73426
* CheckTailCallReturnConstraints is missing a check on theArnold Schwaighofer2009-06-151-1/+5
| | | | | | | | | incomming chain of the RETURN node. The incomming chain must be the outgoing chain of the CALL node. This causes the backend to identify tail calls that are not tail calls. This patch fixes this. llvm-svn: 73387
* Tweak the expansion code for BIT_CONVERT to generate better code Eli Friedman2009-06-071-0/+20
| | | | | | converting from an MMX vector to an i64. llvm-svn: 73024
* Slightly generalize the code that handles shuffles of consecutive loads Eli Friedman2009-06-071-78/+37
| | | | | | | | | | | on x86 to handle more cases. Fix a bug in said code that would cause it to read past the end of an object. Rewrite the code in SelectionDAGLegalize::ExpandBUILD_VECTOR to be a bit more general. Remove PerformBuildVectorCombine, which is no longer necessary with these changes. In addition to simplifying the code, with this change, we can now catch a few more cases of consecutive loads. llvm-svn: 73012
* Fix the expansion for CONCAT_VECTORS so that it doesn't create illegal Eli Friedman2009-06-061-17/+1
| | | | | | types. llvm-svn: 72993
* Factor out a couple of helpers.Eli Friedman2009-06-061-78/+101
| | | | llvm-svn: 72992
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