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path: root/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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* Move the code that inserts X87 FP_REG_KILL instructions from aDan Gohman2008-11-121-3/+0
| | | | | | | | special-purpose hook to a new pass. Also, add check to see if any x87 virtual registers are used, to avoid doing any work in the common case that no x87 code is needed. llvm-svn: 59190
* Change the scheduler accessor methods to accept an explicit TargetMachineDan Gohman2008-11-111-3/+5
| | | | | | | argument instead of taking the SelectionDAG's TargetMachine. This is needed for some upcoming scheduler changes. llvm-svn: 59055
* Take Chris' suggestion and define EnableFastISelVerbose andDan Gohman2008-10-281-8/+3
| | | | | | | EnableFastISelAbort variables for Release mode instead of using ifdefs in the code. llvm-svn: 58350
* Protect the code for fast-isel debugging with #ifndef NDEBUG.Dan Gohman2008-10-281-0/+10
| | | | llvm-svn: 58340
* Turn on LegalizeTypes, the new type legalizationDuncan Sands2008-10-271-2/+2
| | | | | | | codegen infrastructure, by default. Please report any breakage to the mailing lists. llvm-svn: 58232
* Fast-isel no longer an experiment.Dan Gohman2008-10-201-1/+1
| | | | llvm-svn: 57845
* FastISel support for exception-handling constructs.Dan Gohman2008-10-141-47/+50
| | | | | | | | | - Move the EH landing-pad code and adjust it so that it works with FastISel as well as with SDISel. - Add FastISel support for @llvm.eh.exception and @llvm.eh.selector. llvm-svn: 57539
* Fix command-line option printing to print two spaces where needed,Dan Gohman2008-10-141-1/+1
| | | | | | | | | instead of requiring all "short description" strings to begin with two spaces. This makes these strings less mysterious, and it fixes some cases where short description strings mistakenly did not begin with two spaces. llvm-svn: 57521
* Fix fast-isel's handling of atomic instructions. They mayDan Gohman2008-10-041-1/+4
| | | | | | | | expand to multiple basic blocks, in which case fast-isel needs to informed of which block to use as it resumes inserting instructions. llvm-svn: 57040
* Fix FastISel to not initialize the PIC-base register multiple timesDan Gohman2008-09-291-60/+65
| | | | | | in functions with PIC references from more than one basic block. llvm-svn: 56807
* Large mechanical patch.Devang Patel2008-09-251-1/+1
| | | | | | | | | | | | | | | s/ParamAttr/Attribute/g s/PAList/AttrList/g s/FnAttributeWithIndex/AttributeWithIndex/g s/FnAttr/Attribute/g This sets the stage - to implement function notes as function attributes and - to distinguish between function attributes and return value attributes. This requires corresponding changes in llvm-gcc and clang. llvm-svn: 56622
* Don't print fast-isel debug messages by default. Thanks Chris!Dan Gohman2008-09-251-3/+6
| | | | llvm-svn: 56614
* Don't forget the newline in debug output.Dan Gohman2008-09-251-1/+1
| | | | llvm-svn: 56613
* FastISel support for debug info.Dan Gohman2008-09-251-2/+20
| | | | llvm-svn: 56610
* Enable DeadMachineInstructionElim when Fast-ISel is enabled.Dan Gohman2008-09-251-3/+0
| | | | llvm-svn: 56604
* Next round of earlyclobber handling. Approach theDale Johannesen2008-09-241-3/+2
| | | | | | | | | | RA problem by expanding the live interval of an earlyclobber def back one slot. Remove overlap-earlyclobber throughout. Remove earlyclobber bits and their handling from live internals. llvm-svn: 56539
* s/ParameterAttributes/Attributes/gDevang Patel2008-09-231-1/+0
| | | | llvm-svn: 56513
* Arrange for FastISel code to have access to the MachineModuleInfoDan Gohman2008-09-231-4/+7
| | | | | | object. This will be needed to support debug info. llvm-svn: 56508
* Add a bit to mark operands of asm's that conflictDale Johannesen2008-09-171-2/+3
| | | | | | | | | with an earlyclobber operand elsewhere. Propagate this bit and the earlyclobber bit through SDISel. Change linear-scan RA not to allocate regs in a way that conflicts with an earlyclobber. See also comments. llvm-svn: 56290
* Don't take the time to CheckDAGForTailCallsAndFixThem when tail callsDan Gohman2008-09-161-1/+2
| | | | | | | are not enabled. Instead just omit the tail call flag when calls are created. llvm-svn: 56235
* Define CallSDNode, an SDNode subclass for use with ISD::CALL.Dan Gohman2008-09-131-36/+25
| | | | | | | | | | | | | Currently it just holds the calling convention and flags for isVarArgs and isTailCall. And it has several utility methods, which eliminate magic 5+2*i and similar index computations in several places. CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle nodes that are not CSE'd gracefully. llvm-svn: 56183
* Rename ConstantSDNode::getValue to getZExtValue, for consistencyDan Gohman2008-09-121-2/+2
| | | | | | | with ConstantInt. This led to fixing a bug in TargetLowering.cpp using getValue instead of getAPIntValue. llvm-svn: 56159
* Add X86FastISel support for static allocas, and refencesDan Gohman2008-09-101-1/+2
| | | | | | | to static allocas. As part of this change, refactor the address mode code for laods and stores. llvm-svn: 56066
* Add a break statement that I accidentally deleted whenDan Gohman2008-09-101-0/+1
| | | | | | | I shuffled the fast-isel command-line options around. This fixes a bunch of fast-isel failures. llvm-svn: 56057
* Change -fast-isel-no-abort to -fast-isel-abort, which now defaultsDan Gohman2008-09-091-7/+12
| | | | | | | | to being off by default. Also, add assertion checks to check that the various fast-isel-related command-line options are only used when -fast-isel itself is enabled. llvm-svn: 56029
* Add a new option, -fast-isel-verbose, that can be used withDan Gohman2008-09-091-15/+21
| | | | | | | -fast-isel-no-abort to get a dump of all unhandled instructions, without an abort. llvm-svn: 56021
* Remove the code that protected FastISel from aborting inDan Gohman2008-09-091-5/+2
| | | | | | | | the case of loads, stores, and conditional branches. It can handle those now, so any that aren't handled should trigger the abort. llvm-svn: 55977
* Fix a few I's that were meant to be renamed to BI's.Dan Gohman2008-09-081-2/+2
| | | | llvm-svn: 55942
* Avoid redefinition and nnbreak windows build.Evan Cheng2008-09-081-16/+16
| | | | llvm-svn: 55911
* Move the code that inserts copies for function livein registersDan Gohman2008-09-051-7/+113
| | | | | | | | | out of ScheduleDAGEmit.cpp and into SelectionDAGISel.cpp. This allows it to be run exactly once per function, even if multiple SelectionDAG iterations happen in the entry block, as may happen with FastISel. llvm-svn: 55863
* Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman2008-09-041-1/+1
| | | | llvm-svn: 55779
* Create HandlePHINodesInSuccessorBlocksFast, a version ofDan Gohman2008-09-031-32/+41
| | | | | | | | | | | | | HandlePHINodesInSuccessorBlocks that works FastISel-style. This allows PHI nodes to be updated correctly while using FastISel. This also involves some code reorganization; ValueMap and MBBMap are now members of the FastISel class, so they needn't be passed around explicitly anymore. Also, SelectInstructions is changed to SelectInstruction, and only does one instruction at a time. llvm-svn: 55746
* Split the SelectionDAG-building code, including the FunctionLoweringInfoDan Gohman2008-09-031-5134/+6
| | | | | | | and SelectionDAGLowering classes, out of SelectionDAGISel.cpp and put it in a separate file, SelectionDAGBuild.cpp. llvm-svn: 55701
* If TargetSelectInstruction returns true, move to next instruction.Evan Cheng2008-09-031-1/+3
| | | | llvm-svn: 55692
* Ensure that HandlePHINodesInSuccessorBlocks is run for all blocks,Dan Gohman2008-09-021-3/+9
| | | | | | | even in FastISel mode in the case where FastISel successfully selects all the instructions. llvm-svn: 55641
* Add a target callback for FastISel.Dan Gohman2008-08-281-2/+7
| | | | llvm-svn: 55512
* erect abstraction boundaries for accessing SDValue members, rename Val -> ↵Gabor Greif2008-08-281-30/+30
| | | | | | Node to reflect semantics llvm-svn: 55504
* Move CaseBlock, JumpTable, and BitTestBlock to be members ofDan Gohman2008-08-281-80/+77
| | | | | | | | SelectionDAGLowering instead of being in an anonymous namespace. This fixes warnings about SelectionDAGLowering having fields using anonymous namespaces. llvm-svn: 55497
* Fix a FastISel bug where the instructions from lowering the argumentsDan Gohman2008-08-281-12/+16
| | | | | | were being emitted after the first instructions of the entry block. llvm-svn: 55496
* Reduce the size of the Parts vector.Rafael Espindola2008-08-281-3/+4
| | | | llvm-svn: 55483
* Correctly resize the Parts array.Rafael Espindola2008-08-281-1/+1
| | | | llvm-svn: 55471
* Split the ATOMIC NodeType's to include the size, e.g.Dale Johannesen2008-08-281-18/+179
| | | | | | | | | | | | | | | | ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD. Increased the Hardcoded Constant OpActionsCapacity to match. Large but boring; no functional change. This is to support partial-word atomics on ppc; i8 is not a valid type there, so by the time we get to lowering, the ATOMIC_LOAD nodes looks the same whether the type was i8 or i32. The information can be added to the AtomicSDNode, but that is the largest SDNode; I don't fully understand the SDNode allocation, but it is sensitive to the largest node size, so increasing that must be bad. This is the alternative. llvm-svn: 55457
* Reorganize the lifetimes of the major objects SelectionDAGISelDan Gohman2008-08-271-227/+336
| | | | | | | | | | | | | | | | | | | | works with. SelectionDAG, FunctionLoweringInfo, and SelectionDAGLowering objects now get created once per SelectionDAGISel instance, and can be reused across blocks and across functions. Previously, they were created and destroyed each time they were needed. This reorganization simplifies the handling of PHI nodes, and also SwitchCases, JumpTables, and BitTestBlocks. This simplification has the side effect of fixing a bug in FastISel where successor PHI nodes weren't being updated correctly. This is also a step towards making the transition from FastISel into and out of SelectionDAG faster, and also making plain SelectionDAG faster on code with lots of little blocks. llvm-svn: 55450
* disallow direct access to SDValue::ResNo, provide a getter insteadGabor Greif2008-08-261-11/+11
| | | | llvm-svn: 55394
* typo fix.Chris Lattner2008-08-261-1/+1
| | | | llvm-svn: 55355
* Make MBBMap a DenseMap instead of a std::map.Dan Gohman2008-08-231-3/+3
| | | | llvm-svn: 55220
* Move the point at which FastISel taps into the SelectionDAGISelDan Gohman2008-08-231-223/+228
| | | | | | | | | | | | | | | | | | process up to a higher level. This allows FastISel to leverage more of SelectionDAGISel's infastructure, such as updating Machine PHI nodes. Also, implement transitioning from SDISel back to FastISel in the middle of a block, so it's now possible to go back and forth. This allows FastISel to hand individual CallInsts and other complicated things off to SDISel to handle, while handling the rest of the block itself. To help support this, reorganize the SelectionDAG class so that it is allocated once and reused throughout a function, instead of being completely reallocated for each block. llvm-svn: 55219
* Avoid creating shift-by-zero SDNodes in the common case ofDan Gohman2008-08-231-9/+10
| | | | | | | i8* getelementptr. DAGCombine eliminates these, but this is a fairly common case. llvm-svn: 55214
* Reapply r55191 and r55192.Dan Gohman2008-08-221-1/+1
| | | | llvm-svn: 55205
* Reverting r55190, r55191, and r55192. They broke the build with this error ↵Bill Wendling2008-08-221-1/+1
| | | | | | | | | | | | | | | message: {standard input}:17:bad register name `%sil' make[4]: *** [libgcc/./_addvsi3.o] Error 1 make[4]: *** Waiting for unfinished jobs.... {standard input}:23:bad register name `%dil' {standard input}:28:bad register name `%dil' make[4]: *** [libgcc/./_addvdi3.o] Error 1 {standard input}:18:bad register name `%sil' make[4]: *** [libgcc/./_subvsi3.o] Error 1 llvm-svn: 55200
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