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* disable this code for now, it's not yet safely updating phi nodesChris Lattner2006-10-221-3/+3
| | | | llvm-svn: 31124
* Implement PR964 and Regression/CodeGen/Generic/SwitchLowering.llChris Lattner2006-10-221-5/+44
| | | | llvm-svn: 31119
* For PR950:Reid Spencer2006-10-201-34/+36
| | | | | | | | This patch implements the first increment for the Signless Types feature. All changes pertain to removing the ConstantSInt and ConstantUInt classes in favor of just using ConstantInt. llvm-svn: 31063
* Partially in response to PR926: insert the newly created machine basicBill Wendling2006-10-191-8/+17
| | | | | | | | blocks into the basic block list when lowering the switch inst. into a binary tree of if-then statements. This allows the "visitSwitchCase" func to allow for fall-through behavior. llvm-svn: 31057
* Pass AliasAnalysis thru to DAGCombiner.Jim Laskey2006-10-161-2/+7
| | | | llvm-svn: 30984
* Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.Evan Cheng2006-10-131-6/+6
| | | | llvm-svn: 30945
* Jimptables working again on alpha.Andrew Lenharth2006-10-111-1/+5
| | | | | | As a bonus, use the GOT node instead of the AlphaISD::GOT for internal stuff. llvm-svn: 30873
* add two helper methods.Chris Lattner2006-10-111-1/+90
| | | | llvm-svn: 30869
* Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.Evan Cheng2006-10-091-7/+8
| | | | llvm-svn: 30844
* jump tables handle picChris Lattner2006-10-061-5/+0
| | | | llvm-svn: 30776
* Make use of getStore().Evan Cheng2006-10-051-12/+10
| | | | llvm-svn: 30759
* Fix some typos that can cause a flag value to have more than one use.Evan Cheng2006-10-041-2/+2
| | | | llvm-svn: 30727
* refactor critical edge breaking out into the SplitCritEdgesForPHIConstants ↵Chris Lattner2006-09-281-9/+20
| | | | | | | | method. This is a baby step towards fixing PR925. llvm-svn: 30643
* Comments on JumpTablenessAndrew Lenharth2006-09-261-0/+3
| | | | llvm-svn: 30615
* Add support for other relocation bases to jump tables, as well as custom asm ↵Andrew Lenharth2006-09-241-1/+2
| | | | | | directives llvm-svn: 30593
* PIC jump table entries are always 32-bit. This fixes PIC jump table support ↵Evan Cheng2006-09-241-5/+4
| | | | | | on X86-64. llvm-svn: 30590
* absolute addresses must match pointer sizeAndrew Lenharth2006-09-181-1/+1
| | | | llvm-svn: 30461
* If LSR went through a lot of trouble to put constants (e.g. the addr of a globalChris Lattner2006-09-131-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | in a specific BB, don't undo this!). This allows us to compile CodeGen/X86/loop-hoist.ll into: _foo: xorl %eax, %eax *** movl L_Arr$non_lazy_ptr, %ecx movl 4(%esp), %edx LBB1_1: #cond_true movl %eax, (%ecx,%eax,4) incl %eax cmpl %edx, %eax jne LBB1_1 #cond_true LBB1_2: #return ret instead of: _foo: xorl %eax, %eax movl 4(%esp), %ecx LBB1_1: #cond_true *** movl L_Arr$non_lazy_ptr, %edx movl %eax, (%edx,%eax,4) incl %eax cmpl %ecx, %eax jne LBB1_1 #cond_true LBB1_2: #return ret This was noticed in 464.h264ref. This doesn't usually affect PPC, but strikes X86 all the time. llvm-svn: 30290
* This code was trying too hard. By eliminating redundant edges in the CFGChris Lattner2006-09-101-6/+3
| | | | | | | | | due to switch cases going to the same place, it make #pred != #phi entries, breaking live interval analysis. This fixes 458.sjeng on x86 with llc. llvm-svn: 30236
* Implement the fpowi now by lowering to a libcallChris Lattner2006-09-091-0/+7
| | | | llvm-svn: 30225
* Fix CodeGen/Generic/2006-09-06-SwitchLowering.ll, a bug where SDIsel insertedChris Lattner2006-09-071-15/+32
| | | | | | too many phi operands when lowering a switch to branches in some cases. llvm-svn: 30142
* Completely eliminate def&use operands. Now a register operand is EITHER aChris Lattner2006-09-051-4/+4
| | | | | | def operand or a use operand. llvm-svn: 30109
* s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|Chris Lattner2006-08-271-1/+1
| | | | llvm-svn: 29911
* minor changes.Chris Lattner2006-08-161-4/+5
| | | | llvm-svn: 29740
* eliminate use of getNode that takes vector of valuetypes.Chris Lattner2006-08-141-21/+22
| | | | llvm-svn: 29687
* Start eliminating temporary vectors used to create DAG nodes. Instead, passChris Lattner2006-08-081-73/+53
| | | | | | | | | | | | | | | | | | | in the start of an array and a count of operands where applicable. In many cases, the number of operands is known, so this static array can be allocated on the stack, avoiding the heap. In many other cases, a SmallVector can be used, which has the same benefit in the common cases. I updated a lot of code calling getNode that takes a vector, but ran out of time. The rest of the code should be updated, and these methods should be removed. We should also do the same thing to eliminate the methods that take a vector of MVT::ValueTypes. It would be extra nice to convert the dagiselemitter to avoid creating vectors for operands when calling getTargetNode. llvm-svn: 29566
* Work around a GCC 3.3.5 bug noticed by a user.Chris Lattner2006-08-031-1/+1
| | | | llvm-svn: 29490
* Final polish on machine pass registries.Jim Laskey2006-08-021-8/+19
| | | | llvm-svn: 29471
* Now that the ISel is available, it's possible to create a default instructionJim Laskey2006-08-011-17/+22
| | | | | | scheduler creator. llvm-svn: 29452
* 1. Change use of "Cache" to "Default".Jim Laskey2006-08-011-4/+9
| | | | | | | | | | | 2. Added argument to instruction scheduler creators so the creators can do special things. 3. Repaired target hazard code. 4. Misc. More to follow. llvm-svn: 29450
* Introducing plugable register allocators and instruction schedulers.Jim Laskey2006-08-011-66/+31
| | | | llvm-svn: 29434
* PIC jump table entries are always 32-bit even in 64-bit mode.Evan Cheng2006-08-011-4/+11
| | | | llvm-svn: 29422
* Code cleanups, per reviewNate Begeman2006-07-271-2/+0
| | | | llvm-svn: 29347
* Support jump tables when in PIC relocation modelNate Begeman2006-07-271-4/+10
| | | | llvm-svn: 29318
* Mems can be in the output list also. This is the second half of a fix forChris Lattner2006-07-201-1/+2
| | | | | | PR833 llvm-svn: 29224
* Use hidden visibility to make symbols in an anonymous namespace getChris Lattner2006-06-281-1/+2
| | | | | | dropped. This shrinks libllvmgcc.dylib another 67K llvm-svn: 28975
* Consistency. EXTRACT_ELEMENT index operand should have ptr type.Evan Cheng2006-06-151-10/+13
| | | | llvm-svn: 28795
* Make sure to update the CFG correctly if a switch only has a default dest.Chris Lattner2006-06-121-0/+1
| | | | | | This fixes CodeGen/Generic/2006-06-12-LowerSwitchCrash.ll llvm-svn: 28755
* Fix X86/inline-asm.ll:test2, a case where an input value was implicitlyChris Lattner2006-06-081-3/+6
| | | | | | truncated. llvm-svn: 28733
* Fix Regression/CodeGen/X86/inline-asm.ll, a case where inline asm causesChris Lattner2006-06-081-6/+13
| | | | | | implement extension of a register. llvm-svn: 28731
* Make CALL node consistent with RET node. Signness of value has type MVT::i32Evan Cheng2006-05-261-5/+5
| | | | | | | instead of MVT::i1. Either is fine except MVT::i32 is probably a legal type for most (if not all) platforms while MVT::i1 is not. llvm-svn: 28511
* Change RET node to include signness information of the return values. e.g.Evan Cheng2006-05-261-1/+5
| | | | | | RET chain, value1, sign1, value2, sign2 llvm-svn: 28509
* CALL node change: now including signness of every argument.Evan Cheng2006-05-251-2/+7
| | | | llvm-svn: 28461
* -enable-unsafe-fp-math implies -enable-finite-only-fp-mathEvan Cheng2006-05-231-2/+1
| | | | llvm-svn: 28437
* Fix missing includeVladimir Prus2006-05-231-0/+1
| | | | llvm-svn: 28435
* Incorrect SETCC CondCode used for FP comparisons.Evan Cheng2006-05-231-9/+20
| | | | llvm-svn: 28433
* Fix the result of the call to use a correct vbitconvert. There is no need toChris Lattner2006-05-171-23/+8
| | | | | | use getPackedTypeBreakdown at all here. llvm-svn: 28365
* Correct a previous patch which broke CodeGen/PowerPC/vec_call.llChris Lattner2006-05-171-18/+5
| | | | llvm-svn: 28364
* Fixed a LowerCallTo and LowerArguments bug. They were introducing illegalEvan Cheng2006-05-171-12/+27
| | | | | | | | VBIT_VECTOR nodes. There were some confusion about the semantics of getPackedTypeBreakdown(). e.g. for <4 x f32> it returns 1 and v4f32, not 4, and f32. llvm-svn: 28352
* Add support for calls that pass and return legal vectors.Chris Lattner2006-05-161-3/+60
| | | | llvm-svn: 28340
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