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author | Evan Cheng <evan.cheng@apple.com> | 2006-05-17 18:16:39 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2006-05-17 18:16:39 +0000 |
commit | 751cd7653db7350807da48de9c5ebb03d33f86b8 (patch) | |
tree | d9a5c08ddc70a79cfdefc95f983f021c89dde60a /llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | |
parent | 6dcec44fec50ce8190f22711888f69f16824ba60 (diff) | |
download | bcm5719-llvm-751cd7653db7350807da48de9c5ebb03d33f86b8.tar.gz bcm5719-llvm-751cd7653db7350807da48de9c5ebb03d33f86b8.zip |
Fixed a LowerCallTo and LowerArguments bug. They were introducing illegal
VBIT_VECTOR nodes. There were some confusion about the semantics of
getPackedTypeBreakdown(). e.g. for <4 x f32> it returns 1 and v4f32, not 4,
and f32.
llvm-svn: 28352
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 39 |
1 files changed, 27 insertions, 12 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index bddaa904aa4..e1d4d8e1e6d 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -2455,20 +2455,25 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { // Figure out if there is a Packed type corresponding to this Vector // type. If so, convert to the packed type. + bool Supported = false; MVT::ValueType TVT = MVT::getVectorType(getValueType(EltTy), NumElems); - if (TVT != MVT::Other && isTypeLegal(TVT)) { + if (TVT != MVT::Other) { SDOperand N = SDOperand(Result, i++); // Handle copies from generic vectors to registers. MVT::ValueType PTyElementVT, PTyLegalElementVT; unsigned NE = getPackedTypeBreakdown(PTy, PTyElementVT, PTyLegalElementVT); - // Insert a VBIT_CONVERT of the FORMAL_ARGUMENTS to a - // "N x PTyElementVT" MVT::Vector type. - N = DAG.getNode(ISD::VBIT_CONVERT, MVT::Vector, N, - DAG.getConstant(NE, MVT::i32), - DAG.getValueType(PTyElementVT)); - Ops.push_back(N); - } else { + // FIXME: handle NE > 1 cases. + if (NE == 1) { + N = DAG.getNode(ISD::VBIT_CONVERT, MVT::Vector, N, + DAG.getConstant(NumElems, MVT::i32), + DAG.getValueType(getValueType(EltTy))); + Ops.push_back(N); + Supported = true; + } + } + + if (!Supported) { assert(0 && "Don't support illegal by-val vector arguments yet!"); abort(); } @@ -2546,15 +2551,25 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg, // Figure out if there is a Packed type corresponding to this Vector // type. If so, convert to the packed type. + bool Supported = false; MVT::ValueType TVT = MVT::getVectorType(getValueType(EltTy), NumElems); - if (TVT != MVT::Other && isTypeLegal(TVT)) { + if (TVT != MVT::Other) { // Handle copies from generic vectors to registers. MVT::ValueType PTyElementVT, PTyLegalElementVT; unsigned NE = getPackedTypeBreakdown(PTy, PTyElementVT, PTyLegalElementVT); - // Insert a VBIT_CONVERT of the MVT::Vector type to the packed type. - Ops.push_back(DAG.getNode(ISD::VBIT_CONVERT, TVT, Op)); - } else { + // FIXME: handle NE > 1 cases. + if (NE == 1) { + // Insert a VBIT_CONVERT of the MVT::Vector type to the packed type. + Op = DAG.getNode(ISD::VBIT_CONVERT, MVT::Vector, Op, + DAG.getConstant(NumElems, MVT::i32), + DAG.getValueType(getValueType(EltTy))); + Ops.push_back(Op); + Supported = true; + } + } + + if (!Supported) { assert(0 && "Don't support illegal by-val vector call args yet!"); abort(); } |