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path: root/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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* Do not use typeinfo to identify pass in pass manager.Devang Patel2007-05-011-0/+2
| | | | llvm-svn: 36632
* Continue refactoring inline asm code. If there is an earlyclobber outputChris Lattner2007-04-301-79/+108
| | | | | | | | register, preallocate all input registers and the early clobbered output. This fixes PR1357 and CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll llvm-svn: 36599
* refactor GetRegistersForValue to take OpInfo as an argument instead of variousChris Lattner2007-04-301-98/+101
| | | | | | pieces of it. No functionality change. llvm-svn: 36592
* refactor some code, no functionality changeChris Lattner2007-04-301-44/+52
| | | | llvm-svn: 36590
* generalize aggregate handlingChris Lattner2007-04-291-5/+21
| | | | llvm-svn: 36568
* memory operands that have a direct operand should have their stores createdChris Lattner2007-04-281-35/+42
| | | | | | | | | | | | | before the copies into physregs are done. This avoids having flag operands skip the store, causing cycles in the dag at sched time. This fixes infinite loops on these tests: test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll for PR1308 test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll for PR828 llvm-svn: 36547
* eliminate more redundant constraint type analysisChris Lattner2007-04-281-6/+2
| | | | llvm-svn: 36546
* merge constraint type analysis stuff together.Chris Lattner2007-04-281-14/+21
| | | | llvm-svn: 36545
* Significant refactoring of the inline asm stuff, to support future changes.Chris Lattner2007-04-281-82/+107
| | | | | | No functionality change. llvm-svn: 36544
* memory inputs to an inline asm are required to have an address available.Chris Lattner2007-04-281-18/+32
| | | | | | | | | If the operand is not already an indirect operand, spill it to a constant pool entry or a stack slot. This fixes PR1356 and CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll llvm-svn: 36536
* Fix CodeGen/Generic/2007-04-27-LargeMemObject.ll andChris Lattner2007-04-281-4/+10
| | | | | | CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll llvm-svn: 36534
* Fix this to match change to InlineAsm class.Chris Lattner2007-04-281-3/+3
| | | | llvm-svn: 36524
* improve EH global handling, patch by Duncan Sands.Chris Lattner2007-04-271-6/+10
| | | | llvm-svn: 36499
* enable Anton's shift/and switch lowering stuff! It now passes ppc bootstrapChris Lattner2007-04-261-1/+0
| | | | | | successfully! woohoo... llvm-svn: 36496
* Fixx off-by-one bug, which prevents llvm-gcc bootstrap on ppc32Anton Korobeynikov2007-04-261-1/+1
| | | | llvm-svn: 36490
* This was lefted out. Fixed sumarray-dbl.Evan Cheng2007-04-251-0/+1
| | | | llvm-svn: 36445
* allow support for 64-bit stack objectsChris Lattner2007-04-251-1/+1
| | | | llvm-svn: 36420
* Assertion when using a 1-element vector for an add operation. Get theBill Wendling2007-04-241-4/+7
| | | | | | real vector type in this case. llvm-svn: 36402
* Use '-1U' where '-1UL' is obvious overkill, eliminating gcc warnings aboutScott Michel2007-04-241-2/+2
| | | | | | tests always being true in the process. llvm-svn: 36387
* PR400 phase 2. Propagate attributed load/store information through DAGs.Christopher Lamb2007-04-221-5/+7
| | | | llvm-svn: 36356
* Revert Christopher Lamb's load/store alignment changes.Reid Spencer2007-04-211-7/+5
| | | | llvm-svn: 36309
* add support for alignment attributes on load/store instructionsChristopher Lamb2007-04-211-5/+7
| | | | llvm-svn: 36301
* disable switch lowering using shift/and. It still breaks ppc bootstrap forChris Lattner2007-04-141-0/+1
| | | | | | some reason. :( Will investigate. llvm-svn: 36011
* Fix PR1325: Case range optimization was performed in the case itAnton Korobeynikov2007-04-141-4/+2
| | | | | | shouldn't. Also fix some "latent" bug on 64-bit platforms llvm-svn: 35990
* disable shift/and lowering to work around PR1325 for now.Chris Lattner2007-04-141-1/+3
| | | | llvm-svn: 35985
* Fix PR1323 : we haven't updated phi nodes in good manner :)Anton Korobeynikov2007-04-131-0/+1
| | | | llvm-svn: 35963
* the result of an inline asm copy can be an arbitrary VT that the registerChris Lattner2007-04-121-4/+21
| | | | | | | | class supports. In the case of vectors, this means we often get the wrong type (e.g. we get v4f32 instead of v8i16). Make sure to convert the vector result to the right type. This fixes CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll llvm-svn: 35944
* For PR1284:Reid Spencer2007-04-121-1/+6
| | | | | | Implement the "part_set" intrinsic. llvm-svn: 35938
* For PR1146:Reid Spencer2007-04-111-13/+13
| | | | | | | Put the parameter attributes in their own ParamAttr name space. Adjust the rest of llvm as a result. llvm-svn: 35877
* apparently some people commit without building the tree, or they forget toChris Lattner2007-04-101-1/+1
| | | | | | commit a LOT of files. llvm-svn: 35858
* No longer needed.Jeff Cohen2007-04-091-1/+0
| | | | llvm-svn: 35850
* Use integer log for metric calculationAnton Korobeynikov2007-04-091-2/+2
| | | | llvm-svn: 35834
* Unbreak VC++ build.Jeff Cohen2007-04-091-2/+3
| | | | llvm-svn: 35817
* Next stage into switch lowering refactoringAnton Korobeynikov2007-04-091-19/+340
| | | | | | | | | | 1. Fix some bugs in the jump table lowering threshold 2. Implement much better metric for optimal pivot selection 3. Tune thresholds for different lowering methods 4. Implement shift-and trick for lowering small (<machine word length) cases with few destinations. Good testcase will follow. llvm-svn: 35816
* For PR1146:Reid Spencer2007-04-091-13/+17
| | | | | | Adapt handling of parameter attributes to use the new ParamAttrsList class. llvm-svn: 35814
* implement CodeGen/X86/inline-asm-x-scalar.ll:test3Chris Lattner2007-04-091-2/+9
| | | | llvm-svn: 35802
* Fix PR1316Chris Lattner2007-04-091-4/+4
| | | | llvm-svn: 35783
* Fix for CodeGen/X86/2007-04-08-InlineAsmCrash.ll and PR1314Chris Lattner2007-04-081-1/+1
| | | | llvm-svn: 35779
* minor comment fixChris Lattner2007-04-061-1/+1
| | | | llvm-svn: 35696
* Change the bit_part_select (non)implementation from "return 0" to abort.Reid Spencer2007-04-051-3/+5
| | | | llvm-svn: 35679
* Implement the llvm.bit.part_select.iN.iN.iN overloaded intrinsic.Reid Spencer2007-04-041-0/+5
| | | | llvm-svn: 35678
* Properly emit range comparisons for switch cases, where neighbour casesAnton Korobeynikov2007-04-041-71/+181
| | | | | | | go to the same destination. Now we're producing really good code for switch-lower-feature.ll testcase llvm-svn: 35672
* For PR1297:Reid Spencer2007-04-011-24/+31
| | | | | | | Adjust for changes in the bit counting intrinsics. They all return i32 now so we have to trunc/zext the DAG node accordingly. llvm-svn: 35546
* move a bunch of code out of the sdisel pass into its own opt pass ↵Chris Lattner2007-03-311-483/+1
| | | | | | "codegenprepare". llvm-svn: 35529
* Scale 1 is always ok.Evan Cheng2007-03-281-1/+1
| | | | llvm-svn: 35407
* GEP index sinking fixes:Evan Cheng2007-03-281-40/+35
| | | | | | | | | 1) Take address scale into consideration. e.g. i32* -> scale 4. 2) Examine all the users of GEP. 3) Generalize to inter-block GEP's (no longer uses loopinfo). 4) Don't do xform if GEP has other variable index(es). llvm-svn: 35403
* Remove dead codeAnton Korobeynikov2007-03-271-82/+46
| | | | llvm-svn: 35380
* Split big monster into small helpers. No functionality change.Anton Korobeynikov2007-03-271-190/+285
| | | | llvm-svn: 35379
* SDISel does not preserve all, it changes CFG and other info.Evan Cheng2007-03-271-1/+0
| | | | llvm-svn: 35376
* First step of switch lowering refactoring: perform worklist-drivenAnton Korobeynikov2007-03-251-176/+249
| | | | | | strategy, emit JT's where possible. llvm-svn: 35338
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