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path: root/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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* Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman2008-09-041-1/+1
| | | | llvm-svn: 55779
* Create HandlePHINodesInSuccessorBlocksFast, a version ofDan Gohman2008-09-031-32/+41
| | | | | | | | | | | | | HandlePHINodesInSuccessorBlocks that works FastISel-style. This allows PHI nodes to be updated correctly while using FastISel. This also involves some code reorganization; ValueMap and MBBMap are now members of the FastISel class, so they needn't be passed around explicitly anymore. Also, SelectInstructions is changed to SelectInstruction, and only does one instruction at a time. llvm-svn: 55746
* Split the SelectionDAG-building code, including the FunctionLoweringInfoDan Gohman2008-09-031-5134/+6
| | | | | | | and SelectionDAGLowering classes, out of SelectionDAGISel.cpp and put it in a separate file, SelectionDAGBuild.cpp. llvm-svn: 55701
* If TargetSelectInstruction returns true, move to next instruction.Evan Cheng2008-09-031-1/+3
| | | | llvm-svn: 55692
* Ensure that HandlePHINodesInSuccessorBlocks is run for all blocks,Dan Gohman2008-09-021-3/+9
| | | | | | | even in FastISel mode in the case where FastISel successfully selects all the instructions. llvm-svn: 55641
* Add a target callback for FastISel.Dan Gohman2008-08-281-2/+7
| | | | llvm-svn: 55512
* erect abstraction boundaries for accessing SDValue members, rename Val -> ↵Gabor Greif2008-08-281-30/+30
| | | | | | Node to reflect semantics llvm-svn: 55504
* Move CaseBlock, JumpTable, and BitTestBlock to be members ofDan Gohman2008-08-281-80/+77
| | | | | | | | SelectionDAGLowering instead of being in an anonymous namespace. This fixes warnings about SelectionDAGLowering having fields using anonymous namespaces. llvm-svn: 55497
* Fix a FastISel bug where the instructions from lowering the argumentsDan Gohman2008-08-281-12/+16
| | | | | | were being emitted after the first instructions of the entry block. llvm-svn: 55496
* Reduce the size of the Parts vector.Rafael Espindola2008-08-281-3/+4
| | | | llvm-svn: 55483
* Correctly resize the Parts array.Rafael Espindola2008-08-281-1/+1
| | | | llvm-svn: 55471
* Split the ATOMIC NodeType's to include the size, e.g.Dale Johannesen2008-08-281-18/+179
| | | | | | | | | | | | | | | | ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD. Increased the Hardcoded Constant OpActionsCapacity to match. Large but boring; no functional change. This is to support partial-word atomics on ppc; i8 is not a valid type there, so by the time we get to lowering, the ATOMIC_LOAD nodes looks the same whether the type was i8 or i32. The information can be added to the AtomicSDNode, but that is the largest SDNode; I don't fully understand the SDNode allocation, but it is sensitive to the largest node size, so increasing that must be bad. This is the alternative. llvm-svn: 55457
* Reorganize the lifetimes of the major objects SelectionDAGISelDan Gohman2008-08-271-227/+336
| | | | | | | | | | | | | | | | | | | | works with. SelectionDAG, FunctionLoweringInfo, and SelectionDAGLowering objects now get created once per SelectionDAGISel instance, and can be reused across blocks and across functions. Previously, they were created and destroyed each time they were needed. This reorganization simplifies the handling of PHI nodes, and also SwitchCases, JumpTables, and BitTestBlocks. This simplification has the side effect of fixing a bug in FastISel where successor PHI nodes weren't being updated correctly. This is also a step towards making the transition from FastISel into and out of SelectionDAG faster, and also making plain SelectionDAG faster on code with lots of little blocks. llvm-svn: 55450
* disallow direct access to SDValue::ResNo, provide a getter insteadGabor Greif2008-08-261-11/+11
| | | | llvm-svn: 55394
* typo fix.Chris Lattner2008-08-261-1/+1
| | | | llvm-svn: 55355
* Make MBBMap a DenseMap instead of a std::map.Dan Gohman2008-08-231-3/+3
| | | | llvm-svn: 55220
* Move the point at which FastISel taps into the SelectionDAGISelDan Gohman2008-08-231-223/+228
| | | | | | | | | | | | | | | | | | process up to a higher level. This allows FastISel to leverage more of SelectionDAGISel's infastructure, such as updating Machine PHI nodes. Also, implement transitioning from SDISel back to FastISel in the middle of a block, so it's now possible to go back and forth. This allows FastISel to hand individual CallInsts and other complicated things off to SDISel to handle, while handling the rest of the block itself. To help support this, reorganize the SelectionDAG class so that it is allocated once and reused throughout a function, instead of being completely reallocated for each block. llvm-svn: 55219
* Avoid creating shift-by-zero SDNodes in the common case ofDan Gohman2008-08-231-9/+10
| | | | | | | i8* getelementptr. DAGCombine eliminates these, but this is a fairly common case. llvm-svn: 55214
* Reapply r55191 and r55192.Dan Gohman2008-08-221-1/+1
| | | | llvm-svn: 55205
* Reverting r55190, r55191, and r55192. They broke the build with this error ↵Bill Wendling2008-08-221-1/+1
| | | | | | | | | | | | | | | message: {standard input}:17:bad register name `%sil' make[4]: *** [libgcc/./_addvsi3.o] Error 1 make[4]: *** Waiting for unfinished jobs.... {standard input}:23:bad register name `%dil' {standard input}:28:bad register name `%dil' make[4]: *** [libgcc/./_addvdi3.o] Error 1 {standard input}:18:bad register name `%sil' make[4]: *** [libgcc/./_subvsi3.o] Error 1 llvm-svn: 55200
* Support non-fallthrough unconditional branches in FastISel.Dan Gohman2008-08-221-1/+1
| | | | llvm-svn: 55191
* First cut, un-optimized (and untested) fast isel lowering of GetElementPtrInst.Evan Cheng2008-08-201-2/+2
| | | | llvm-svn: 55085
* Simplify FastISel's constructor argument list, make the FastISelDan Gohman2008-08-201-3/+3
| | | | | | | | class hold a MachineRegisterInfo member, and make the MachineBasicBlock be passed in to SelectInstructions rather than the FastISel constructor. llvm-svn: 55076
* Dump the instruction that foiled ISel even when -debug is not used.Dan Gohman2008-08-201-1/+3
| | | | llvm-svn: 55075
* Kill off SimpleBBISel, it's replaced by FastISel.Evan Cheng2008-08-201-4/+1
| | | | llvm-svn: 55067
* Disable DAGCombine's alignment inference in "fast" codegen mode.Dan Gohman2008-08-201-4/+4
| | | | llvm-svn: 55059
* Use BitVector instead of std::vector<unsigned char>.Dan Gohman2008-08-201-2/+1
| | | | llvm-svn: 55054
* Fix a leak in the FastISel code that Chris pointed out.Dan Gohman2008-08-201-0/+8
| | | | llvm-svn: 55031
* Add support for running SelectionDAG if FastISel fails. This is underDan Gohman2008-08-201-11/+16
| | | | | | | a command-line option, so that the default behavior is an abort, which is useful for exposing code that isn't supported yet. llvm-svn: 55028
* Add code to call FastISel, and a command-line option to enable it.Dan Gohman2008-08-191-1/+32
| | | | llvm-svn: 55015
* Rename some GC classes so that their roll will hopefully be clearer.Gordon Henriksen2008-08-171-17/+18
| | | | | | | | | | | | | | | | | | In particular, Collector was confusing to implementors. Several thought that this compile-time class was the place to implement their runtime GC heap. Of course, it doesn't even exist at runtime. Specifically, the renames are: Collector -> GCStrategy CollectorMetadata -> GCFunctionInfo CollectorModuleMetadata -> GCModuleInfo CollectorRegistry -> GCRegistry Function::getCollector -> getGC (setGC, hasGC, clearGC) Several accessors and nested types have also been renamed to be consistent. These changes should be obvious. llvm-svn: 54899
* Factor GC metadata table assembly generation out of Collector in preparation ↵Gordon Henriksen2008-08-171-1/+1
| | | | | | for splitting AsmPrinter into its own library. llvm-svn: 54881
* Rename SelectionDAGISel's FastISel to Fast, to begin to makeDan Gohman2008-08-131-3/+3
| | | | | | room for the new FastISel instruction selection code. llvm-svn: 54749
* Add skeleton of simple basic block instruction selector.Evan Cheng2008-08-081-3/+7
| | | | llvm-svn: 54522
* Factor code that finalize PHI nodes, jump tables, etc. out of ↵Evan Cheng2008-08-071-14/+23
| | | | | | SelectBasicBlock. No functionality changes. llvm-svn: 54438
* Remove the -disable-correct-folding option, which was ugly and is no longer ↵Owen Anderson2008-08-051-7/+2
| | | | | | needed. llvm-svn: 54361
* This option doesn't need to be a target option. It can be in SDISel instead.Owen Anderson2008-08-051-0/+3
| | | | llvm-svn: 54336
* - Fix SelectionDAG to generate correct CFGs.Owen Anderson2008-08-041-4/+17
| | | | | | | | - Add a basic machine-level dead block eliminator. These two have to go together, since many other parts of the code generator are unable to handle the unreachable blocks otherwise created. llvm-svn: 54333
* Fix SDISel lowering of PHI nodes to use ComputeValueVTs.Dan Gohman2008-08-041-9/+20
| | | | | | | This allows it to work correctly on aggregate values. This fixes PR2623. llvm-svn: 54331
* Fix SDISel lowering of zeroinitializer and undef to use ComputeValueVTs.Dan Gohman2008-08-041-24/+8
| | | | | | | This allows it to work correctly on nested aggregate values. This fixes PR2625. llvm-svn: 54330
* Add a flag to disable jump table generation (allDale Johannesen2008-07-311-2/+3
| | | | | | | | switches use the binary search algorithm) for environments that don't support it. PPC64 JIT is such an environment; turn the flag on for that. llvm-svn: 54248
* Don't look for leaf values to store when lowering stores ofDan Gohman2008-07-301-2/+6
| | | | | | empty structs. This fixes PR2612. llvm-svn: 54226
* Add vector shifts to the IR, patch by Eli Friedman.Nate Begeman2008-07-291-5/+6
| | | | | | CodeGen & Clang work coming next. llvm-svn: 54161
* Fold the useful features of alist and alist_node into ilist, andDan Gohman2008-07-281-15/+14
| | | | | | | | | | | | | | | | a new ilist_node class, and remove them. Unlike alist_node, ilist_node doesn't attempt to manage storage itself, so it avoids the associated problems, including being opaque in gdb. Adjust the Recycler class so that it doesn't depend on alist_node. Also, change it to use explicit Size and Align parameters, allowing it to work when the largest-sized node doesn't have the greatest alignment requirement. Change MachineInstr's MachineMemOperand list from a pool-backed alist to a std::list for now. llvm-svn: 54146
* Rename SDOperand to SDValue.Dan Gohman2008-07-271-247/+247
| | | | llvm-svn: 54128
* Use AliasAnalysis::pointsToConstantMemory in SDISel to avoid unnecessaryDan Gohman2008-07-251-7/+15
| | | | | | | dependencies with constant load nodes. This allows them to be scheduled freely. llvm-svn: 54001
* Enable first-class aggregates support.Dan Gohman2008-07-231-20/+0
| | | | | | | | | | | | Remove the GetResultInst instruction. It is still accepted in LLVM assembly and bitcode, where it is now auto-upgraded to ExtractValueInst. Also, remove support for return instructions with multiple values. These are auto-upgraded to use InsertValueInst instructions. The IRBuilder still accepts multiple-value returns, and auto-upgrades them to InsertValueInst instructions. llvm-svn: 53941
* After early-lowering the FORMAL_ARGUMENTS node, delete it.Dan Gohman2008-07-211-0/+7
| | | | llvm-svn: 53874
* Add titles to the various SelectionDAG viewGraph callsDan Gohman2008-07-211-10/+58
| | | | | | | that include useful information like the name of the block being viewed and the current phase of compilation. llvm-svn: 53872
* Turn LegalizeTypes back off again for the moment:Duncan Sands2008-07-171-6/+4
| | | | | | | it is breaking Darwin bootstrap due to missing functionality. llvm-svn: 53721
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