| Commit message (Collapse) | Author | Age | Files | Lines |
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of apint codegen failure is the DAG combiner doing
the wrong thing because it was comparing MVT's using
< rather than comparing the number of bits. Removing
the < method makes this mistake impossible to commit.
Instead, add helper methods for comparing bits and use
them.
llvm-svn: 52098
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llvm-svn: 52045
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and better control the abstraction. Rename the type
to MVT. To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits(). Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).
llvm-svn: 52044
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the desired alignment, the frame destination alignment may still be larger than the desired alignment. Don't change its alignment to something smaller.
llvm-svn: 51970
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for dagcombine to do this.
llvm-svn: 51886
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llvm-svn: 51807
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memmove to a more plausible value, now that it's actually being used.
llvm-svn: 51696
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llvm-svn: 51667
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llvm-svn: 51591
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and/or to handle more cases (such as this add-sitofp.ll testcase), and
port it to selectiondag's ComputeNumSignBits.
llvm-svn: 51469
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ComputeNumSignBits to SelectionDAG's ComputeNumSignBits.
llvm-svn: 51348
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and memset. Currently only X86 target is taking advantage of these.
llvm-svn: 51140
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SETOEQ, is it does with (SETEQ & SETULE), map it to SETEQ.
llvm-svn: 51112
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element from address with an offset.
pshufd $1, (%rdi), %xmm0
movd %xmm0, %eax
=>
movl 4(%rdi), %eax
llvm-svn: 51026
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several things that were neither in an anonymous namespace nor static
but not intended to be global.
llvm-svn: 51017
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This is necessary to unbreak the build.
llvm-svn: 50988
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llvm-svn: 50793
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ComputeMaskedBits.
llvm-svn: 50692
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llvm-svn: 50663
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llvm-svn: 50591
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llvm-svn: 50562
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memcpy/memset expansion. It was a bug for the SVOffset value
to be used in the actual address calculations.
llvm-svn: 50359
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ComputeMaskedBits knows about cttz, ctlz, and ctpop. Teach
SelectionDAG's ComputeMaskedBits what InstCombine's knows
about SRem. And teach them both some things about high bits
in Mul, UDiv, URem, and Sub. This allows instcombine and
dagcombine to eliminate sign-extension operations in
several new cases.
llvm-svn: 50358
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This fixes the testsuite failure on ppcf128-4.ll.
llvm-svn: 49994
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may fix a build error on Visual Studio.
llvm-svn: 49876
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Rename SDOperandImpl back to SDOperand.
Introduce the SDUse class that represents a use of the SDNode referred by
an SDOperand. Now it is more similar to Use/Value classes.
Patch is approved by Dan Gohman.
llvm-svn: 49795
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llvm-svn: 49676
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memory intrinsic expansion code.
llvm-svn: 49666
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on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.
Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.
This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.
Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.
This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.
llvm-svn: 49572
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llvm-svn: 49524
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review feedback from Chris quite a while ago. No functionality
change.
llvm-svn: 49348
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by Dan Gohman is fixed.
llvm-svn: 49330
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llvm-svn: 49124
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llvm-svn: 48914
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In order to handle indexed nodes I had to introduce
a new constructor, and since I was there I factorized
the code in the various load constructors.
llvm-svn: 48894
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LLVM Value/Use does and MachineRegisterInfo/MachineOperand does.
This allows constant time for all uses list maintenance operations.
The idea was suggested by Chris. Reviewed by Evan and Dan.
Patch is tested and approved by Dan.
On normal use-cases compilation speed is not affected. On very big basic
blocks there are compilation speedups in the range of 15-20% or even better.
llvm-svn: 48822
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transformed to undef. But this is such a common idiom (misuse) we are going to handle it.
llvm-svn: 48792
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llvm-svn: 48726
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llvm-svn: 48683
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sdisel CSE.
llvm-svn: 48673
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flags. This is needed by the new legalize types
infrastructure which wants to expand the 64 bit
constants previously used to hold the flags on
32 bit machines. There are two functional changes:
(1) in LowerArguments, if a parameter has the zext
attribute set then that is marked in the flags;
before it was being ignored; (2) PPC had some bogus
code for handling two word arguments when using the
ELF 32 ABI, which was hard to convert because of
the bogusness. As suggested by the original author
(Nicolas Geoffray), I've disabled it for the moment.
Tested with "make check" and the Ada ACATS testsuite.
llvm-svn: 48640
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llvm-svn: 48344
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getCopyToParts problem was noticed by the new
LegalizeTypes infrastructure. In order to avoid
this kind of thing in the future I've added a
check that EXTRACT_ELEMENT is only used with
integers. Once LegalizeTypes is up and running
most likely BUILD_PAIR and EXTRACT_ELEMENT can
be removed, in favour of using apints instead.
llvm-svn: 48294
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llvm-svn: 48257
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into:
_test:
fldz
ret
instead of:
_test:
subl $12, %esp
#IMPLICIT_DEF %xmm0
movsd %xmm0, (%esp)
fldl (%esp)
addl $12, %esp
ret
llvm-svn: 48213
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_test3:
movd %rdi, %xmm1
#IMPLICIT_DEF %xmm0
punpcklqdq %xmm1, %xmm0
ret
instead of:
_test3:
#IMPLICIT_DEF %rax
movd %rax, %xmm0
movd %rdi, %xmm1
punpcklqdq %xmm1, %xmm0
ret
This is still not ideal. There is no reason to two xmm regs.
llvm-svn: 48058
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and prefetchnta instructions.
llvm-svn: 48042
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llvm-svn: 47998
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llvm-svn: 47992
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except ppc long double. This allows us to shrink constant pool
entries for x86 long double constants, which in turn allows us to
use flds/fldl instead of fldt.
llvm-svn: 47938
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