diff options
author | Evan Cheng <evan.cheng@apple.com> | 2008-05-29 08:22:04 +0000 |
---|---|---|
committer | Evan Cheng <evan.cheng@apple.com> | 2008-05-29 08:22:04 +0000 |
commit | 5e28227dbd2902be4f5b1604ca3fd4fa2481c1e7 (patch) | |
tree | 5f9357b8a2a60bf8547772f2d10556e131176c1a /llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | |
parent | f4aece5976997fda705d7470105156d5b8a850ee (diff) | |
download | bcm5719-llvm-5e28227dbd2902be4f5b1604ca3fd4fa2481c1e7.tar.gz bcm5719-llvm-5e28227dbd2902be4f5b1604ca3fd4fa2481c1e7.zip |
Implement vector shift up / down and insert zero with ps{rl}lq / ps{rl}ldq.
llvm-svn: 51667
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 44c72b6bec4..24954d75d2e 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -1853,10 +1853,17 @@ SDOperand SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned Idx) { unsigned NumElems = PermMask.getNumOperands(); SDOperand V = (Idx < NumElems) ? N->getOperand(0) : N->getOperand(1); Idx %= NumElems; - if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) { - return (Idx == 0) - ? V.getOperand(0) : getNode(ISD::UNDEF, MVT::getVectorElementType(VT)); + + if (V.getOpcode() == ISD::BIT_CONVERT) { + V = V.getOperand(0); + if (MVT::getVectorNumElements(V.getValueType()) != NumElems) + return SDOperand(); } + if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) + return (Idx == 0) ? V.getOperand(0) + : getNode(ISD::UNDEF, MVT::getVectorElementType(VT)); + if (V.getOpcode() == ISD::BUILD_VECTOR) + return V.getOperand(Idx); if (V.getOpcode() == ISD::VECTOR_SHUFFLE) { SDOperand Elt = PermMask.getOperand(Idx); if (Elt.getOpcode() == ISD::UNDEF) |