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path: root/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h
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* Add a new TargetInstrInfo MachineInstr opcode, COPY_TO_SUBCLASS.Dan Gohman2009-04-131-0/+13
| | | | | | | | | | | | | | | | This will be used to replace things like X86's MOV32to32_. Enhance ScheduleDAGSDNodesEmit to be more flexible and robust in the presense of subregister superclasses and subclasses. It can now cope with the definition of a virtual register being in a subclass of a use. Re-introduce the code for recording register superreg classes and subreg classes. This is needed because when subreg extracts and inserts get coalesced away, the virtual registers are left in the correct subclass. llvm-svn: 68961
* When scheduling a block in parts, keep track of the overallDan Gohman2009-02-111-0/+7
| | | | | | | | | | | instruction index across each part. Instruction indices are used to make live range queries, and live ranges can extend beyond scheduling region boundaries. Refactor the ScheduleDAGSDNodes class some more so that it doesn't have to worry about this additional information. llvm-svn: 64288
* Delete an unused member function.Dan Gohman2009-02-061-2/+0
| | | | llvm-svn: 63941
* Move ScheduleDAGSDNodes.h to be a private header. Front-endsDan Gohman2009-02-061-0/+161
that previously included this header should include SchedulerRegistry.h instead. llvm-svn: 63937
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