summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
Commit message (Collapse)AuthorAgeFilesLines
* Fix a typo in a comment.Dan Gohman2007-04-261-1/+1
| | | | llvm-svn: 36485
* Estimate a cost using the possible number of scratch registers required and useEvan Cheng2007-03-141-9/+47
| | | | | | | | | | it as a late BURR scheduling tie-breaker. Intuitively, it's good to push down instructions whose results are liveout so their long live ranges won't conflict with other values which are needed inside the BB. Further prioritize liveout instructions by the number of operands which are calculated within the BB. llvm-svn: 35109
* Try schedule def + use closer whne Sethi-Ullman numbers are the same.Evan Cheng2007-03-131-6/+38
| | | | | | | | | | | | | | | | | | | | | e.g. t1 = op t2, c1 t3 = op t4, c2 and the following instructions are both ready. t2 = op c3 t4 = op c4 Then schedule t2 = op first. i.e. t4 = op c4 t2 = op c3 t1 = op t2, c1 t3 = op t4, c2 This creates more short live intervals which work better with the register allocator. llvm-svn: 35089
* switch the sched unit map over to use a DenseMap instead of std::map. ThisChris Lattner2007-02-031-5/+5
| | | | | | speeds up isel as a whole time by 2.6%. llvm-svn: 33810
* Fit in 80 columnsChris Lattner2007-02-011-5/+7
| | | | llvm-svn: 33745
* Naming consistency.Evan Cheng2007-01-081-25/+27
| | | | llvm-svn: 33026
* Fix for PR1075: bottom-up register-reduction scheduling actually increases ↵Evan Cheng2007-01-081-120/+72
| | | | | | | | | | register pressure. - Fixed bugs in sethi-ullman number computation and priority queue comparison functions. - Separate code that handles priority computation special cases from SU number computation. llvm-svn: 33025
* Removing even more <iostream> includes.Bill Wendling2006-12-071-16/+15
| | | | llvm-svn: 32320
* Match TargetInstrInfo changes.Evan Cheng2006-12-011-8/+4
| | | | llvm-svn: 32098
* Remove dead code; added a missing null ptr check.Evan Cheng2006-11-061-32/+1
| | | | llvm-svn: 31478
* Changes to use operand constraints to process two-address instructions.Evan Cheng2006-11-041-44/+128
| | | | llvm-svn: 31453
* silence warningChris Lattner2006-11-031-35/+0
| | | | llvm-svn: 31397
* For PR786:Reid Spencer2006-11-021-2/+0
| | | | | | | | | | Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting fall out by removing unused variables. Remaining warnings have to do with unused functions (I didn't want to delete code without review) and unused variables in generated code. Maintainers should clean up the remaining issues when they see them. All changes pass DejaGnu tests and Olden. llvm-svn: 31380
* Clean up.Evan Cheng2006-11-011-5/+11
| | | | llvm-svn: 31359
* CopyFromReg starts a live range so its use should not be considered a floater.Evan Cheng2006-11-011-1/+1
| | | | llvm-svn: 31356
* Debug tweak.Evan Cheng2006-10-141-2/+2
| | | | llvm-svn: 30959
* s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|Chris Lattner2006-08-271-1/+1
| | | | llvm-svn: 29911
* switch the SUnit pred/succ sets from being std::sets to being smallvectors.Chris Lattner2006-08-171-30/+30
| | | | | | | | This reduces selectiondag time on kc++ from 5.43s to 4.98s (9%). More significantly, this speeds up the default ppc scheduler from ~1571ms to 1063ms, a 33% speedup. llvm-svn: 29743
* Final polish on machine pass registries.Jim Laskey2006-08-021-1/+1
| | | | llvm-svn: 29471
* 1. Change use of "Cache" to "Default".Jim Laskey2006-08-011-2/+4
| | | | | | | | | | | 2. Added argument to instruction scheduler creators so the creators can do special things. 3. Repaired target hazard code. 4. Misc. More to follow. llvm-svn: 29450
* Introducing plugable register allocators and instruction schedulers.Jim Laskey2006-08-011-4/+14
| | | | llvm-svn: 29434
* Use an enumeration to eliminate data relocations.Jim Laskey2006-07-211-1/+1
| | | | llvm-svn: 29249
* Use hidden visibility to make symbols in an anonymous namespace getChris Lattner2006-06-281-2/+4
| | | | | | dropped. This shrinks libllvmgcc.dylib another 67K llvm-svn: 28975
* Shave another 27K off libllvmgcc.dylib with visibility hiddenChris Lattner2006-06-281-1/+2
| | | | llvm-svn: 28973
* Make sure the register pressure reduction schedulers work for non-uniformEvan Cheng2006-05-301-12/+14
| | | | | | latency targets, e.g. PPC32. llvm-svn: 28561
* Turn on -sched-commute-nodes by default.Evan Cheng2006-05-251-7/+2
| | | | llvm-svn: 28465
* Fixing 2006-05-01-SchedCausingSpills.ll; some clean upEvan Cheng2006-05-131-9/+63
| | | | llvm-svn: 28279
* Refactor a bunch of includes so that TargetMachine.h doesn't have to includeOwen Anderson2006-05-121-0/+1
| | | | | | | TargetData.h. This should make recompiles a bit faster with my current TargetData tinkering. llvm-svn: 28238
* Add capability to scheduler to commute nodes for profit.Evan Cheng2006-05-121-24/+46
| | | | | | | If a two-address code whose first operand has uses below, it should be commuted when possible. llvm-svn: 28230
* Refactor scheduler code. Move register-reduction list scheduler to aEvan Cheng2006-05-111-0/+813
separate file. Added an initial implementation of top-down register pressure reduction list scheduler. llvm-svn: 28226
OpenPOWER on IntegriCloud