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path: root/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
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* Removing even more <iostream> includes.Bill Wendling2006-12-071-9/+8
| | | | llvm-svn: 32320
* Detemplatize the Statistic class. The only type it is instantiated withChris Lattner2006-12-061-2/+2
| | | | | | is 'unsigned'. llvm-svn: 32279
* Changes to use operand constraints to process two-address instructions.Evan Cheng2006-11-041-2/+3
| | | | llvm-svn: 31453
* s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|Chris Lattner2006-08-271-1/+1
| | | | llvm-svn: 29911
* switch the SUnit pred/succ sets from being std::sets to being smallvectors.Chris Lattner2006-08-171-20/+24
| | | | | | | | This reduces selectiondag time on kc++ from 5.43s to 4.98s (9%). More significantly, this speeds up the default ppc scheduler from ~1571ms to 1063ms, a 33% speedup. llvm-svn: 29743
* Final polish on machine pass registries.Jim Laskey2006-08-021-1/+1
| | | | llvm-svn: 29471
* 1. Change use of "Cache" to "Default".Jim Laskey2006-08-011-2/+4
| | | | | | | | | | | 2. Added argument to instruction scheduler creators so the creators can do special things. 3. Repaired target hazard code. 4. Misc. More to follow. llvm-svn: 29450
* Introducing plugable register allocators and instruction schedulers.Jim Laskey2006-08-011-7/+12
| | | | llvm-svn: 29434
* Reduce number of exported symbolsAndrew Lenharth2006-07-201-2/+2
| | | | llvm-svn: 29220
* Shave another 27K off libllvmgcc.dylib with visibility hiddenChris Lattner2006-06-281-1/+2
| | | | llvm-svn: 28973
* When a priority_queue is empty, the behavior of top() operator isEvan Cheng2006-05-301-0/+1
| | | | | | non-deterministic. Returns NULL when it's empty! llvm-svn: 28560
* Refactor a bunch of includes so that TargetMachine.h doesn't have to includeOwen Anderson2006-05-121-0/+1
| | | | | | | TargetData.h. This should make recompiles a bit faster with my current TargetData tinkering. llvm-svn: 28238
* Refactor scheduler code. Move register-reduction list scheduler to aEvan Cheng2006-05-111-907/+20
| | | | | | | separate file. Added an initial implementation of top-down register pressure reduction list scheduler. llvm-svn: 28226
* Templatify RegReductionPriorityQueueEvan Cheng2006-05-101-7/+12
| | | | llvm-svn: 28212
* Add pseudo dependency to force a def&use operand to be scheduled last (unlessEvan Cheng2006-05-091-17/+108
| | | | | | | the distance between the def and another use is much longer). This is under option control for now "-sched-lower-defnuse". llvm-svn: 28201
* Fix VC++ compilation error.Jeff Cohen2006-05-051-1/+1
| | | | llvm-svn: 28117
* Initial support for register pressure aware scheduling. The register reductionEvan Cheng2006-05-041-50/+238
| | | | | | | | | | scheduler can go into a "vertical mode" (i.e. traversing up the two-address chain, etc.) when the register pressure is low. This does seem to reduce the number of spills in the cases I've looked at. But with x86, it's no guarantee the performance of the code improves. It can be turned on with -sched-vertically option. llvm-svn: 28108
* Bottom up register pressure reduction work: clean up some hacks and enhancedEvan Cheng2006-05-031-75/+72
| | | | | | | the heuristic to further reduce spills for several test cases. (Note, it may not necessarily translate to runtime win!) llvm-svn: 28076
* Dis-favor stores moreEvan Cheng2006-05-011-2/+2
| | | | llvm-svn: 28035
* Bottom up register-pressure reduction scheduler now pushes store operationsEvan Cheng2006-05-011-17/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | up the schedule. This helps code that looks like this: loads ... computations (first set) ... stores (first set) ... loads computations (seccond set) ... stores (seccond set) ... Without this change, the stores and computations are more likely to interleave: loads ... loads ... computations (first set) ... computations (second set) ... computations (first set) ... stores (first set) ... computations (second set) ... stores (stores set) ... This can increase the number of spills if we are unlucky. llvm-svn: 28033
* Didn't mean ScheduleDAGList.cpp to make the last checkin.Evan Cheng2006-05-011-33/+17
| | | | llvm-svn: 28030
* Remove temp. option -spiller-check-liveout, it didn't cause any failure nor ↵Evan Cheng2006-05-011-17/+33
| | | | | | performance regressions. llvm-svn: 28029
* Don't advance the hazard recognizer when there are no hazards and no ↵Chris Lattner2006-03-121-25/+40
| | | | | | | | | | | instructions to be emitted. Don't add one to the latency of a completed instruction if the latency of the op is 0. llvm-svn: 26718
* Chain operands aren't real uses: they don't require the full latency of theChris Lattner2006-03-121-4/+10
| | | | | | predecessor to finish before they can start. llvm-svn: 26717
* As a pending queue data structure to keep track of instructions whoseChris Lattner2006-03-121-36/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | operands have all issued, but whose results are not yet available. This allows us to compile: int G; int test(int A, int B, int* P) { return (G+A)*(B+1); } to: _test: lis r2, ha16(L_G$non_lazy_ptr) addi r4, r4, 1 lwz r2, lo16(L_G$non_lazy_ptr)(r2) lwz r2, 0(r2) add r2, r2, r3 mullw r3, r2, r4 blr instead of this, which has a stall between the lis/lwz: _test: lis r2, ha16(L_G$non_lazy_ptr) lwz r2, lo16(L_G$non_lazy_ptr)(r2) addi r4, r4, 1 lwz r2, 0(r2) add r2, r2, r3 mullw r3, r2, r4 blr llvm-svn: 26716
* rename priorityqueue -> availablequeue. When a node is scheduled, rememberChris Lattner2006-03-111-34/+37
| | | | | | which cycle it lands on. llvm-svn: 26714
* Make CurrCycle a local var instead of an instance varChris Lattner2006-03-111-19/+20
| | | | llvm-svn: 26713
* Move some methods around so that BU specific code is together, TD specific codeChris Lattner2006-03-111-236/+245
| | | | | | is together, and direction independent code is together. llvm-svn: 26712
* merge preds/chainpreds -> preds setChris Lattner2006-03-111-93/+61
| | | | | | | | | merge succs/chainsuccs -> succs set This has no functionality change, simplifies the code, and reduces the size of sunits. llvm-svn: 26711
* Move some simple-sched-specific instance vars to the simple scheduler.Chris Lattner2006-03-101-1/+1
| | | | llvm-svn: 26690
* Make EmitNode take a SDNode instead of a NodeInfo*Chris Lattner2006-03-101-8/+3
| | | | llvm-svn: 26687
* Move the VRBase field from NodeInfo to being a separate, explicit, map.Chris Lattner2006-03-101-2/+3
| | | | llvm-svn: 26686
* no need to build groups anymoreChris Lattner2006-03-101-2/+0
| | | | llvm-svn: 26684
* Create SUnits directly from the SelectionDAG.Chris Lattner2006-03-101-87/+87
| | | | llvm-svn: 26683
* Push PrepareNodeInfo/IdentifyGroups down the inheritance hierarchyChris Lattner2006-03-101-0/+5
| | | | llvm-svn: 26682
* Teach the latency scheduler some new tricks. In particular, to break ties,Chris Lattner2006-03-101-9/+156
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | keep track of a sense of "mobility", i.e. how many other nodes scheduling one node will free up. For something like this: float testadd(float *X, float *Y, float *Z, float *W, float *V) { return (*X+*Y)*(*Z+*W)+*V; } For example, this makes us schedule *X then *Y, not *X then *Z. The former allows us to issue the add, the later only lets us issue other loads. This turns the above code from this: _testadd: lfs f0, 0(r3) lfs f1, 0(r6) lfs f2, 0(r4) lfs f3, 0(r5) fadds f0, f0, f2 fadds f1, f3, f1 lfs f2, 0(r7) fmadds f1, f0, f1, f2 blr into this: _testadd: lfs f0, 0(r6) lfs f1, 0(r5) fadds f0, f1, f0 lfs f1, 0(r4) lfs f2, 0(r3) fadds f1, f2, f1 lfs f2, 0(r7) fmadds f1, f1, f0, f2 blr llvm-svn: 26680
* add an aggregate method for reinserting scheduled nodes, add a callback forChris Lattner2006-03-101-8/+23
| | | | | | priority impls that want to be notified when a node is scheduled llvm-svn: 26678
* Fix VC++ build breakage.Jeff Cohen2006-03-101-3/+3
| | | | llvm-svn: 26676
* remove temporary optionChris Lattner2006-03-091-3/+1
| | | | llvm-svn: 26646
* yes yes, enabled debug output is badChris Lattner2006-03-091-3/+0
| | | | llvm-svn: 26637
* switch the t-d scheduler to use a really dumb and trivial critical pathChris Lattner2006-03-091-1/+104
| | | | | | latency priority function. llvm-svn: 26636
* Pull latency information for target instructions out of the latency tables. :)Chris Lattner2006-03-091-46/+80
| | | | | | | | | Only enable this with -use-sched-latencies, I'll enable it by default with a clean nightly tester run tonight. PPC is the only target that provides latency info currently. llvm-svn: 26634
* PriorityQueue is an instance var, use it.Chris Lattner2006-03-091-39/+33
| | | | llvm-svn: 26632
* add some commentsChris Lattner2006-03-091-8/+13
| | | | llvm-svn: 26631
* Refactor the priority mechanism one step further: now that it is a separateChris Lattner2006-03-091-136/+185
| | | | | | | | class, sever its implementation from the interface. Now we can provide new implementations of the same interface (priority computation) without touching the scheduler itself. llvm-svn: 26630
* Split the priority function computation and priority queue management outChris Lattner2006-03-081-113/+150
| | | | | | of the ScheduleDAGList class into a new SchedulingPriorityQueue class. llvm-svn: 26613
* switch from an explicitly managed list of SUnits to a simple vector of sunitsChris Lattner2006-03-081-35/+28
| | | | llvm-svn: 26612
* Shrinkify some fields, fit to 80 columnsChris Lattner2006-03-081-11/+11
| | | | llvm-svn: 26611
* remove "Slot", it is deadChris Lattner2006-03-081-32/+31
| | | | llvm-svn: 26609
* Change the interface for getting a target HazardRecognizer to be more clean.Chris Lattner2006-03-081-12/+11
| | | | llvm-svn: 26608
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