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authorJim Laskey <jlaskey@mac.com>2006-08-01 14:21:23 +0000
committerJim Laskey <jlaskey@mac.com>2006-08-01 14:21:23 +0000
commit95eda5b1f32dfbf2485c1d78a7b4ce9d33284e4a (patch)
tree34c2696747b60094f853e5d07e0b27f09a89177d /llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
parent95035cf0014445e88a750466eb75950e4b0058ea (diff)
downloadbcm5719-llvm-95eda5b1f32dfbf2485c1d78a7b4ce9d33284e4a.tar.gz
bcm5719-llvm-95eda5b1f32dfbf2485c1d78a7b4ce9d33284e4a.zip
Introducing plugable register allocators and instruction schedulers.
llvm-svn: 29434
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp19
1 files changed, 12 insertions, 7 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
index ee01370d59b..3d249733c63 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
@@ -19,6 +19,7 @@
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "sched"
+#include "llvm/CodeGen/MachinePassRegistry.h"
#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/Target/MRegisterInfo.h"
@@ -38,6 +39,10 @@ namespace {
static Statistic<> NumStalls("scheduler", "Number of pipeline stalls");
}
+static RegisterScheduler
+ tdListDAGScheduler("list-td", " Top-down list scheduler",
+ createTDListDAGScheduler);
+
namespace {
//===----------------------------------------------------------------------===//
/// ScheduleDAGList - The actual list scheduler implementation. This supports
@@ -511,12 +516,12 @@ void LatencyPriorityQueue::AdjustPriorityOfUnscheduledPreds(SUnit *SU) {
// Public Constructor Functions
//===----------------------------------------------------------------------===//
-/// createTDListDAGScheduler - This creates a top-down list scheduler with the
-/// specified hazard recognizer.
-ScheduleDAG* llvm::createTDListDAGScheduler(SelectionDAG &DAG,
- MachineBasicBlock *BB,
- HazardRecognizer *HR) {
- return new ScheduleDAGList(DAG, BB, DAG.getTarget(),
+/// createTDListDAGScheduler - This creates a top-down list scheduler with a
+/// new hazard recognizer. This scheduler takes ownership of the hazard
+/// recognizer and deletes it when done.
+ScheduleDAG* llvm::createTDListDAGScheduler(SelectionDAG *DAG,
+ MachineBasicBlock *BB) {
+ return new ScheduleDAGList(*DAG, BB, DAG->getTarget(),
new LatencyPriorityQueue(),
- HR);
+ new HazardRecognizer());
}
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