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* Bug fix. Must also match ResNo when matching an operand with a user.Evan Cheng2007-12-141-1/+1
| | | | llvm-svn: 45028
* Make labels work in asm blocks; allow labels asDale Johannesen2007-11-051-3/+6
| | | | | | | parameters. Rename ValueRefList to ParamList in AsmParser, since its only use is for parameters. llvm-svn: 43734
* Executive summary: getTypeSize -> getTypeStoreSize / getABITypeSize.Duncan Sands2007-11-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The meaning of getTypeSize was not clear - clarifying it is important now that we have x86 long double and arbitrary precision integers. The issue with long double is that it requires 80 bits, and this is not a multiple of its alignment. This gives a primitive type for which getTypeSize differed from getABITypeSize. For arbitrary precision integers it is even worse: there is the minimum number of bits needed to hold the type (eg: 36 for an i36), the maximum number of bits that will be overwriten when storing the type (40 bits for i36) and the ABI size (i.e. the storage size rounded up to a multiple of the alignment; 64 bits for i36). This patch removes getTypeSize (not really - it is still there but deprecated to allow for a gradual transition). Instead there is: (1) getTypeSizeInBits - a number of bits that suffices to hold all values of the type. For a primitive type, this is the minimum number of bits. For an i36 this is 36 bits. For x86 long double it is 80. This corresponds to gcc's TYPE_PRECISION. (2) getTypeStoreSizeInBits - the maximum number of bits that is written when storing the type (or read when reading it). For an i36 this is 40 bits, for an x86 long double it is 80 bits. This is the size alias analysis is interested in (getTypeStoreSize returns the number of bytes). There doesn't seem to be anything corresponding to this in gcc. (3) getABITypeSizeInBits - this is getTypeStoreSizeInBits rounded up to a multiple of the alignment. For an i36 this is 64, for an x86 long double this is 96 or 128 depending on the OS. This is the spacing between consecutive elements when you form an array out of this type (getABITypeSize returns the number of bytes). This is TYPE_SIZE in gcc. Since successive elements in a SequentialType (arrays, pointers and vectors) need to be aligned, the spacing between them will be given by getABITypeSize. This means that the size of an array is the length times the getABITypeSize. It also means that GEP computations need to use getABITypeSize when computing offsets. Furthermore, if an alloca allocates several elements at once then these too need to be aligned, so the size of the alloca has to be the number of elements multiplied by getABITypeSize. Logically speaking this doesn't have to be the case when allocating just one element, but it is simpler to also use getABITypeSize in this case. So alloca's and mallocs should use getABITypeSize. Finally, since gcc's only notion of size is that given by getABITypeSize, if you want to output assembler etc the same as gcc then getABITypeSize is the size you want. Since a store will overwrite no more than getTypeStoreSize bytes, and a read will read no more than that many bytes, this is the notion of size appropriate for alias analysis calculations. In this patch I have corrected all type size uses except some of those in ScalarReplAggregates, lib/Codegen, lib/Target (the hard cases). I will get around to auditing these too at some point, but I could do with some help. Finally, I made one change which I think wise but others might consider pointless and suboptimal: in an unpacked struct the amount of space allocated for a field is now given by the ABI size rather than getTypeStoreSize. I did this because every other place that reserves memory for a type (eg: alloca) now uses getABITypeSize, and I didn't want to make an exception for unpacked structs, i.e. I did it to make things more uniform. This only effects structs containing long doubles and arbitrary precision integers. If someone wants to pack these types more tightly they can always use a packed struct. llvm-svn: 43620
* EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG likeEvan Cheng2007-10-121-3/+0
| | | | | | | | | (almost) a register copy. However, it always coalesced to the register of the RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub- register uses which adds subtle complications to load folding, spiller rewrite, etc. llvm-svn: 42899
* If a node that defines a physical register that is expensive to copy. TheEvan Cheng2007-10-051-28/+33
| | | | | | | | | scheduler will try a number of tricks in order to avoid generating the copies. This may not be possible in case the node produces a chain value that prevent movement. Try unfolding the load from the node before to allow it to be moved / cloned. llvm-svn: 42625
* Use empty() member functions when that's what's being tested for insteadDan Gohman2007-10-031-1/+1
| | | | | | of comparing begin() and end(). llvm-svn: 42585
* If two instructions are both two-address code, favors (schedule closer toEvan Cheng2007-09-281-5/+5
| | | | | | | terminator) the one that has a CopyToReg use. This fixes 2006-05-11-InstrSched.ll with -new-cc-modeling-scheme. llvm-svn: 42453
* Trim some unneeded fields.Evan Cheng2007-09-281-2/+0
| | | | llvm-svn: 42442
* - Move getPhysicalRegisterRegClass() from ScheduleDAG to MRegisterInfo.Evan Cheng2007-09-261-24/+46
| | | | | | | - Added ability to emit cross class register copies to the BBRU scheduler. - More aggressive backtracking. llvm-svn: 42375
* Allow copyRegToReg to emit cross register classes copies.Evan Cheng2007-09-261-4/+6
| | | | | | Tested with "make check"! llvm-svn: 42346
* Added major new capabilities to scheduler (only BURR for now) to support ↵Evan Cheng2007-09-251-57/+125
| | | | | | physical register dependency. The BURR scheduler can now backtrace and duplicate instructions in order to avoid "expensive / impossible to copy" values (e.g. status flag EFLAGS for x86) from being clobbered. llvm-svn: 42284
* Use struct SDep instead of std::pair for SUnit pred and succ lists. First stepEvan Cheng2007-09-191-6/+6
| | | | | | in tracking physical register output dependencies. llvm-svn: 42125
* Remove dead code.Evan Cheng2007-09-121-1/+1
| | | | llvm-svn: 41899
* Teach the dag scheduler to handle inline asm nodes with multi-value ↵Chris Lattner2007-08-251-8/+9
| | | | | | immediate operands. llvm-svn: 41386
* Do not emit copies for physical register output if it's not used.Evan Cheng2007-08-021-1/+2
| | | | llvm-svn: 40722
* Instead of adding copyfromreg's to handle physical definitions. Now isel canEvan Cheng2007-08-021-68/+78
| | | | | | | | | | | | | | simply specify them as results and let scheduledag handle them. That is, instead of SDOperand Flag = DAG.getTargetNode(Opc, MVT::i32, MVT::Flag, ...) SDOperand Result = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, Flag) Just write: SDOperand Result = DAG.getTargetNode(Opc, MVT::i32, MVT::i32, ...) And let scheduledag emit the move from X86::EAX to a virtual register. llvm-svn: 40710
* Teach DAG scheduling how to properly emit subreg insert/extract machine ↵Christopher Lamb2007-07-261-0/+150
| | | | | | instructions. PR1350 llvm-svn: 40520
* Skeleton of post-RA scheduler; doesn't do anything yet.Dale Johannesen2007-07-131-1/+1
| | | | | | | Change name of -sched option and DEBUG_TYPE to pre-RA-sched; adjust testcases. llvm-svn: 39816
* If the operand is marked M_OPTIONAL_DEF_OPERAND, then it's a def.Evan Cheng2007-07-101-1/+4
| | | | llvm-svn: 38496
* When a node value is only used by a CopyToReg, use the user's dest. This ↵Evan Cheng2007-07-101-50/+55
| | | | | | should not be restricted to nodes that produce only a single value. llvm-svn: 38485
* Change CalculateHeights and CalculateDepths to be non-recursive.Evan Cheng2007-07-061-22/+28
| | | | llvm-svn: 37934
* Pass a SelectionDAG into SDNode::dump everywhere it's used, in preprationDan Gohman2007-06-191-1/+1
| | | | | | | for needing the DAG node to print pre-legalize extended value types, and to get better debug messages with target-specific nodes. llvm-svn: 37656
* Fix some VC++ warnings.Jeff Cohen2007-03-201-0/+1
| | | | llvm-svn: 35224
* Code clean up.Lauro Ramos Venancio2007-03-201-23/+20
| | | | llvm-svn: 35220
* CopyToReg source operand can be a physical register.Lauro Ramos Venancio2007-03-201-3/+19
| | | | llvm-svn: 35213
* print target nodes nicelyChris Lattner2007-02-171-1/+1
| | | | llvm-svn: 34369
* fix indentationChris Lattner2007-02-151-2/+2
| | | | llvm-svn: 34307
* Apply B Scott Michel's patch for PR1184, which improves diagnostics in anChris Lattner2007-02-151-2/+16
| | | | | | abort case. llvm-svn: 34306
* For PR1195:Reid Spencer2007-02-151-1/+1
| | | | | | | Change use of "packed" term to "vector" in comments, strings, variable names, etc. llvm-svn: 34300
* switch the VRBaseMap in the scheduler from an std::map to a DenseMap. ThisChris Lattner2007-02-041-5/+5
| | | | | | speeds up the isel pass from 2.5570s to 2.4722s on kc++ (3.4%). llvm-svn: 33879
* Make LABEL a builtin opcode.Jim Laskey2007-01-261-0/+1
| | | | llvm-svn: 33537
* Renamed getTypeAlignmentShift() to getPreferredTypeAlignmentShift().Evan Cheng2007-01-241-1/+1
| | | | llvm-svn: 33482
* Remove the DoubleTy special case.Evan Cheng2007-01-221-9/+5
| | | | llvm-svn: 33449
* Compensate for loss of DerivedTypes.h in TargetLowering.hReid Spencer2007-01-121-0/+1
| | | | llvm-svn: 33159
* CopyToReg source operand can be a register as well. e.g. Copy from ↵Evan Cheng2007-01-051-2/+6
| | | | | | GlobalBaseReg. llvm-svn: 32929
* Removing even more <iostream> includes.Bill Wendling2006-12-071-25/+23
| | | | llvm-svn: 32320
* Match TargetInstrInfo changes.Evan Cheng2006-12-011-2/+1
| | | | llvm-svn: 32098
* Change MachineInstr ctor's to take a TargetInstrDescriptor reference insteadEvan Cheng2006-11-271-2/+2
| | | | | | of opcode and number of operands. llvm-svn: 31947
* Matches MachineInstr changes.Evan Cheng2006-11-131-4/+1
| | | | llvm-svn: 31712
* Add methods to add implicit def use operands to a MI.Evan Cheng2006-11-111-10/+1
| | | | llvm-svn: 31675
* Add implicit def / use operands to MachineInstr.Evan Cheng2006-11-101-0/+12
| | | | llvm-svn: 31633
* Changes to use operand constraints to process two-address instructions.Evan Cheng2006-11-041-4/+9
| | | | llvm-svn: 31453
* handle global address constant sdnodesChris Lattner2006-10-311-2/+7
| | | | llvm-svn: 31323
* Debug tweak.Evan Cheng2006-10-141-2/+2
| | | | llvm-svn: 30959
* Added support for machine specific constantpool values. These are useful forEvan Cheng2006-09-121-5/+9
| | | | | | representing expressions that can only be resolved at link time, etc. llvm-svn: 30278
* Completely eliminate def&use operands. Now a register operand is EITHER aChris Lattner2006-09-051-8/+8
| | | | | | def operand or a use operand. llvm-svn: 30109
* switch the SUnit pred/succ sets from being std::sets to being smallvectors.Chris Lattner2006-08-171-28/+28
| | | | | | | | This reduces selectiondag time on kc++ from 5.43s to 4.98s (9%). More significantly, this speeds up the default ppc scheduler from ~1571ms to 1063ms, a 33% speedup. llvm-svn: 29743
* Reverse the FlaggedNodes after scanning up for flagged preds or else the ↵Evan Cheng2006-08-071-5/+10
| | | | | | order would be reversed. llvm-svn: 29545
* Use an enumeration to eliminate data relocations.Jim Laskey2006-07-211-6/+23
| | | | llvm-svn: 29249
* It was pointed out that DEBUG() is only available with -debug.Jim Laskey2006-07-111-1/+3
| | | | llvm-svn: 29106
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