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* Add a new getMergeValues method that does not needDuncan Sands2008-07-021-8/+7
| | | | | | | | | | to be passed the list of value types, and use this where appropriate. Inappropriate places are where the value type list is already known and may be long, in which case the existing method is more efficient. llvm-svn: 53035
* Fixed problem in EmitStackConvert where the source and target typeMon P Wang2008-07-021-9/+15
| | | | | | | have different alignment by creating a stack slot with the max alignment of source and target type. llvm-svn: 53031
* Eliminate a compile time warning.Evan Cheng2008-07-011-1/+1
| | | | llvm-svn: 52982
* Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminatingDan Gohman2008-07-011-12/+9
| | | | | | | | | | | | | | | | the need for a flavor operand, and add a new SDNode subclass, LabelSDNode, for use with them to eliminate the need for a label id operand. Change instruction selection to let these label nodes through unmodified instead of creating copies of them. Teach the MachineInstr emitter how to emit a MachineInstr directly from an ISD label node. This avoids the need for allocating SDNodes for the label id and flavor value, as well as SDNodes for each of the post-isel label, label id, and label flavor. llvm-svn: 52943
* Rename ISD::LOCATION to ISD::DBG_STOPPOINT to better reflect itsDan Gohman2008-06-301-15/+10
| | | | | | | | | | | | | | | | | purpose, and give it a custom SDNode subclass so that it doesn't need to have line number, column number, filename string, and directory string, all existing as individual SDNodes to be the operands. This was the only user of ISD::STRING, StringSDNode, etc., so remove those and some associated code. This makes stop-points considerably easier to read in -view-legalize-dags output, and reduces overhead (creating new nodes and copying std::strings into them) on code containing debugging information. llvm-svn: 52924
* Revert the SelectionDAG optimization that makesDuncan Sands2008-06-301-9/+6
| | | | | | | | | | | | | | | | | | it impossible to create a MERGE_VALUES node with only one result: sometimes it is useful to be able to create a node with only one result out of one of the results of a node with more than one result, for example because the new node will eventually be used to replace a one-result node using ReplaceAllUsesWith, cf X86TargetLowering::ExpandFP_TO_SINT. On the other hand, most users of MERGE_VALUES don't need this and for them the optimization was valuable. So add a new utility method getMergeValues for creating MERGE_VALUES nodes which by default performs the optimization. Change almost everywhere to use getMergeValues (and tidy some stuff up at the same time). llvm-svn: 52893
* Implement split and scalarize for SELECT_CC, fixing PR2504Chris Lattner2008-06-301-0/+23
| | | | llvm-svn: 52887
* Remove the OrigVT member from AtomicSDNode, as it is redundant withDan Gohman2008-06-251-2/+2
| | | | | | the base SDNode's VTList. llvm-svn: 52722
* Added MemOperands to Atomic operations since Atomics touches memory.Mon P Wang2008-06-251-13/+17
| | | | | | | | Added abstract class MemSDNode for any Node that have an associated MemOperand Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and atomic.lss => atomic.load.sub llvm-svn: 52706
* Make custom lowering of ADD work correctly. ThisDuncan Sands2008-06-221-3/+3
| | | | | | | | | | fixes PR2476; patch by Richard Osborne. The same problem exists for a bunch of other operators, but I'm ignoring this because they will be automagically fixed when the new LegalizeTypes infrastructure lands, since it already solves this problem centrally. llvm-svn: 52610
* Clean up some uses of std::distance, now that we have allnodes_size.Dan Gohman2008-06-201-2/+1
| | | | llvm-svn: 52545
* ISD::UNDEF should be expanded recursively / iteratively.Evan Cheng2008-06-191-1/+0
| | | | llvm-svn: 52508
* add missing atomic intrinsic from gccAndrew Lenharth2008-06-141-0/+2
| | | | llvm-svn: 52270
* Disable some DAG combiner optimizations that may beDuncan Sands2008-06-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | wrong for volatile loads and stores. In fact this is almost all of them! There are three types of problems: (1) it is wrong to change the width of a volatile memory access. These may be used to do memory mapped i/o, in which case a load can have an effect even if the result is not used. Consider loading an i32 but only using the lower 8 bits. It is wrong to change this into a load of an i8, because you are no longer tickling the other three bytes. It is also unwise to make a load/store wider. For example, changing an i16 load into an i32 load is wrong no matter how aligned things are, since the fact of loading an additional 2 bytes can have i/o side-effects. (2) it is wrong to change the number of volatile load/stores: they may be counted by the hardware. (3) it is wrong to change a volatile load/store that requires one memory access into one that requires several. For example on x86-32, you can store a double in one processor operation, but to store an i64 requires two (two i32 stores). In a multi-threaded program you may want to bitcast an i64 to a double and store as a double because that will occur atomically, and be indivisible to other threads. So it would be wrong to convert the store-of-double into a store of an i64, because this will become two i32 stores - no longer atomic. My policy here is to say that the number of processor operations for an illegal operation is undefined. So it is alright to change a store of an i64 (requires at least two stores; but could be validly lowered to memcpy for example) into a store of double (one processor op). In short, if the new store is legal and has the same size then I say that the transform is ok. It would also be possible to say that transforms are always ok if before they were illegal, whether after they are illegal or not, but that's more awkward to do and I doubt it buys us anything much. However this exposed an interesting thing - on x86-32 a store of i64 is considered legal! That is because operations are marked legal by default, regardless of whether the type is legal or not. In some ways this is clever: before type legalization this means that operations on illegal types are considered legal; after type legalization there are no illegal types so now operations are only legal if they really are. But I consider this to be too cunning for mere mortals. Better to do things explicitly by testing AfterLegalize. So I have changed things so that operations with illegal types are considered illegal - indeed they can never map to a machine operation. However this means that the DAG combiner is more conservative because before it was "accidentally" performing transforms where the type was illegal because the operation was nonetheless marked legal. So in a few such places I added a check on AfterLegalize, which I suppose was actually just forgotten before. This causes the DAG combiner to do slightly more than it used to, which resulted in the X86 backend blowing up because it got a slightly surprising node it wasn't expecting, so I tweaked it. llvm-svn: 52254
* Remove comparison methods for MVT. The main causeDuncan Sands2008-06-081-11/+9
| | | | | | | | | | | of apint codegen failure is the DAG combiner doing the wrong thing because it was comparing MVT's using < rather than comparing the number of bits. Removing the < method makes this mistake impossible to commit. Instead, add helper methods for comparing bits and use them. llvm-svn: 52098
* Wrap MVT::ValueType in a struct to get type safetyDuncan Sands2008-06-061-290/+282
| | | | | | | | | | | | | | | | and better control the abstraction. Rename the type to MVT. To update out-of-tree patches, the main thing to do is to rename MVT::ValueType to MVT, and rewrite expressions like MVT::getSizeInBits(VT) in the form VT.getSizeInBits(). Use VT.getSimpleVT() to extract a MVT::SimpleValueType for use in switch statements (you will get an assert failure if VT is an extended value type - these shouldn't exist after type legalization). This results in a small speedup of codegen and no new testsuite failures (x86-64 linux). llvm-svn: 52044
* Fix spellnig errorScott Michel2008-06-031-6/+5
| | | | llvm-svn: 51917
* Add necessary 64-bit support so that gcc frontend compiles (mostly). CurrentScott Michel2008-06-021-1/+10
| | | | | | | issue is operand promotion for setcc/select... but looks like the fundamental stuff is implemented for CellSPU. llvm-svn: 51884
* Remove an unused variable.Dan Gohman2008-05-301-1/+0
| | | | llvm-svn: 51721
* If the result of a BIT_CONVERT is a v1* vector, it doesn't mean its source ↵Evan Cheng2008-05-161-3/+6
| | | | | | is a v1* vector. llvm-svn: 51192
* Actually scalarize the operand to BIT_CONVERT instead of asking someone to doNate Begeman2008-05-151-1/+2
| | | | | | something with a v1 type. llvm-svn: 51160
* Whitespace cleanups.Dan Gohman2008-05-141-1/+1
| | | | llvm-svn: 51089
* Teach Legalize how to scalarize VSETCCNate Begeman2008-05-121-0/+10
| | | | | | Teach X86 a few more vsetcc patterns. Custom lowering for unsupported ones is next. llvm-svn: 51009
* Add support for vicmp/vfcmp codegen, more legalize support coming.Nate Begeman2008-05-121-0/+26
| | | | | | This is necessary to unbreak the build. llvm-svn: 50988
* Fix a missing break in the ISD::FLT_ROUNDS_ handling. Patch by giuma!Dan Gohman2008-05-121-0/+1
| | | | llvm-svn: 50967
* Added addition atomic instrinsics and, or, xor, min, and max.Mon P Wang2008-05-051-11/+45
| | | | llvm-svn: 50663
* Fix custom target lowering for zero/any/sign_extend: make sure thatScott Michel2008-04-301-5/+3
| | | | | | | DAG.UpdateNodeOperands() is called before (not after) the call to TLI.LowerOperation(). llvm-svn: 50461
* Pull the code to perform an INSERT_VECTOR_ELT in memory out into its own Nate Begeman2008-04-251-43/+68
| | | | | | | function, and then use it to fix a bug in SplitVectorOp that expected inserts to always have constant insertion indices. llvm-svn: 50273
* Switch to using Simplified ConstantFP::get API.Chris Lattner2008-04-201-7/+6
| | | | llvm-svn: 49977
* Correct the SrcValue information in the Expand code for va_copy.Dan Gohman2008-04-171-2/+2
| | | | llvm-svn: 49839
* Ongoing work on improving the instruction selection infrastructure:Roman Levenstein2008-04-161-7/+7
| | | | | | | | | | Rename SDOperandImpl back to SDOperand. Introduce the SDUse class that represents a use of the SDNode referred by an SDOperand. Now it is more similar to Use/Value classes. Patch is approved by Dan Gohman. llvm-svn: 49795
* Factor some libcall code.Duncan Sands2008-04-121-61/+49
| | | | llvm-svn: 49583
* Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not LegalDan Gohman2008-04-121-117/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | on any current target and aren't optimized in DAGCombiner. Instead of using intermediate nodes, expand the operations, choosing between simple loads/stores, target-specific code, and library calls, immediately. Previously, the code to emit optimized code for these operations was only used at initial SelectionDAG construction time; now it is used at all times. This fixes some cases where rep;movs was being used for small copies where simple loads/stores would be better. This also cleans up code that checks for alignments less than 4; let the targets make that decision instead of doing it in target-independent code. This allows x86 to use rep;movs in low-alignment cases. Also, this fixes a bug that resulted in the use of rep;stos for memsets of 0 with non-constant memory size when the alignment was at least 4. It's better to use the library in this case, which can be significantly faster when the size is large. This also preserves more SourceValue information when memory intrinsics are lowered into simple loads/stores. llvm-svn: 49572
* Re-commit of the r48822, where the infinite looping problem discoveredRoman Levenstein2008-04-071-9/+9
| | | | | | by Dan Gohman is fixed. llvm-svn: 49330
* Backing out 48222 temporarily.Evan Cheng2008-04-031-9/+9
| | | | llvm-svn: 49124
* More soft fp fixes.Evan Cheng2008-04-011-1/+2
| | | | llvm-svn: 49016
* Pasto.Evan Cheng2008-04-011-1/+1
| | | | llvm-svn: 49014
* Add comment.Evan Cheng2008-04-011-0/+1
| | | | llvm-svn: 49013
* Unbreak ARM / Thumb soft FP support.Evan Cheng2008-04-011-3/+11
| | | | llvm-svn: 49012
* Use a linked data structure for the uses lists of an SDNode, just like Roman Levenstein2008-03-261-9/+9
| | | | | | | | | | | | | LLVM Value/Use does and MachineRegisterInfo/MachineOperand does. This allows constant time for all uses list maintenance operations. The idea was suggested by Chris. Reviewed by Evan and Dan. Patch is tested and approved by Dan. On normal use-cases compilation speed is not affected. On very big basic blocks there are compilation speedups in the range of 15-20% or even better. llvm-svn: 48822
* Introduce a new node for holding call argumentDuncan Sands2008-03-211-0/+1
| | | | | | | | | | | | | | | | | flags. This is needed by the new legalize types infrastructure which wants to expand the 64 bit constants previously used to hold the flags on 32 bit machines. There are two functional changes: (1) in LowerArguments, if a parameter has the zext attribute set then that is marked in the flags; before it was being ignored; (2) PPC had some bogus code for handling two word arguments when using the ELF 32 ABI, which was hard to convert because of the bogusness. As suggested by the original author (Nicolas Geoffray), I've disabled it for the moment. Tested with "make check" and the Ada ACATS testsuite. llvm-svn: 48640
* Make conversions of i8/i16 to ppcf128 work.Dale Johannesen2008-03-181-10/+13
| | | | llvm-svn: 48493
* Tabs -> spacesNate Begeman2008-03-141-14/+23
| | | | | | | Use getIntPtrConstant in a couple places to shorten stuff up Handle splitting vector shuffles with undefs in the mask llvm-svn: 48351
* More APInt-ification.Dan Gohman2008-03-131-5/+5
| | | | llvm-svn: 48344
* Generalize ExpandIntToFP to handle the case where the operand is legalDan Gohman2008-03-111-11/+22
| | | | | | | | and it's the result that requires expansion. This code is a little confusing because the TargetLoweringInfo tables for [US]INT_TO_FP use the operand type (the integer type) rather than the result type. llvm-svn: 48206
* More APInt-ification.Dan Gohman2008-03-111-7/+7
| | | | llvm-svn: 48201
* Implement more support for fp-to-i128 and i128-to-fp conversions. Dan Gohman2008-03-101-80/+125
| | | | llvm-svn: 48189
* Fix mul expansion to check the correct number of bits forDan Gohman2008-03-101-4/+3
| | | | | | | zero extension when checking if an unsigned multiply is safe. llvm-svn: 48171
* Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC'sScott Michel2008-03-101-25/+32
| | | | | | | | return ValueType can depend its operands' ValueType. This is a cosmetic change, no functionality impacted. llvm-svn: 48145
* Fix two problems in SelectionDAGLegalize::ExpandBUILD_VECTOR's handlingChris Lattner2008-03-091-21/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | of BUILD_VECTORS that only have two unique elements: 1. The previous code was nondeterminstic, because it walked a map in SDOperand order, which isn't determinstic. 2. The previous code didn't handle the case when one element was undef very well. Now we ensure that the generated shuffle mask has the undef vector on the RHS (instead of potentially being on the LHS) and that any elements that refer to it are themselves undef. This allows us to compile CodeGen/X86/vec_set-9.ll into: _test3: movd %rdi, %xmm0 punpcklqdq %xmm0, %xmm0 ret instead of: _test3: movd %rdi, %xmm1 #IMPLICIT_DEF %xmm0 punpcklqdq %xmm1, %xmm0 ret ... saving a register. llvm-svn: 48060
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