| Commit message (Collapse) | Author | Age | Files | Lines |
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lower STACKSAVE/STACKRESTORE into a copy from/to that register.
llvm-svn: 25276
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targets to custom expand them as they desire.
llvm-svn: 25273
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llvm-svn: 25224
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Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl
Targets should add rotl/rotr patterns if they have them
llvm-svn: 25222
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llvm-svn: 25184
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llvm-svn: 25165
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and SRL_PARTS.
* Fix a bug that caused *_PARTS to be custom lowered twice.
llvm-svn: 25157
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llvm-svn: 25124
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llvm-svn: 25116
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inserted in the code.
llvm-svn: 25104
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pass manager do it's thing." Fixes crash when compiling -g files and suppresses
dwarf statements if no debug info is present.
llvm-svn: 25100
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llvm-svn: 25096
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llvm-svn: 25089
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llvm-svn: 25007
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Alpha needs to custom lower *DIV and *REM
llvm-svn: 25006
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llvm-svn: 24992
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currently used.
llvm-svn: 24988
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llvm-svn: 24973
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llvm-svn: 24972
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llvm-svn: 24970
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llvm-svn: 24965
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llvm-svn: 24943
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llvm-svn: 24919
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bytes to pop off stack.
* Added support for X86 SETCC.
llvm-svn: 24917
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llvm-svn: 24911
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scalarizing vectors)
llvm-svn: 24905
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last night, breaking crafty and twolf. Make sure that the newly found
legal nodes are themselves not re-legalized until the next iteration.
Also, since this functionality exists now, we can reduce number of legalizer
iterations by depending on this behavior instead of having to misuse 'do
another iteration' to get the same effect.
llvm-svn: 24875
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llvm-svn: 24870
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llvm-svn: 24843
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llvm-svn: 24828
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llvm-svn: 24826
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llvm-svn: 24804
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llvm-svn: 24754
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llvm-svn: 24748
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ConstantVec legalizing code, which would return constantpool nodes that
were not of the target's pointer type.
llvm-svn: 24691
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llvm-svn: 24677
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them in the PPC backend, to simplify some logic out of Select and
SelectAddr.
llvm-svn: 24657
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out to me.
llvm-svn: 24644
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type when the target did not support them. Also teach Legalize how to
expand ConstantVecs.
This allows us to generate
_test:
lwz r2, 12(r3)
lwz r4, 8(r3)
lwz r5, 4(r3)
lwz r6, 0(r3)
addi r2, r2, 4
addi r4, r4, 3
addi r5, r5, 2
addi r6, r6, 1
stw r2, 12(r3)
stw r4, 8(r3)
stw r5, 4(r3)
stw r6, 0(r3)
blr
For:
void %test(%v4i *%P) {
%T = load %v4i* %P
%S = add %v4i %T, <int 1, int 2, int 3, int 4>
store %v4i %S, %v4i * %P
ret void
}
On PowerPC.
llvm-svn: 24633
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constant nodes with vector types. Also teach the asm printer how to print
ConstantPacked constant pool entries. This allows us to generate altivec
code such as the following, which adds a vector constantto a packed float.
LCPI1_0: <4 x float> < float 0.0e+0, float 0.0e+0, float 0.0e+0, float 1.0e+0 >
.space 4
.space 4
.space 4
.long 1065353216 ; float 1
.text
.align 4
.globl _foo
_foo:
lis r2, ha16(LCPI1_0)
la r2, lo16(LCPI1_0)(r2)
li r4, 0
lvx v0, r4, r2
lvx v1, r4, r3
vaddfp v0, v1, v0
stvx v0, r4, r3
blr
For the llvm code:
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = add <4 x float> %tmp1, < float 0.0, float 0.0, float 0.0, float 1.0 >
store <4 x float> %tmp2, <4 x float> *%a
ret void
}
llvm-svn: 24616
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llvm-svn: 24574
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llvm-svn: 24573
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llvm-svn: 24568
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llvm-svn: 24537
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llvm-svn: 24531
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contributed by Daniel Berlin, with a few cleanups here and there by me.
llvm-svn: 24515
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and make a few changes to the legalization machinery to support more than
16 types.
llvm-svn: 24511
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vector operations (load, add, sub, mul).
This allows us to codegen:
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = add <4 x float> %tmp1, %tmp1
store <4 x float> %tmp2, <4 x float> *%a
ret void
}
on ppc as:
_foo:
lfs f0, 12(r3)
lfs f1, 8(r3)
lfs f2, 4(r3)
lfs f3, 0(r3)
fadds f0, f0, f0
fadds f1, f1, f1
fadds f2, f2, f2
fadds f3, f3, f3
stfs f0, 12(r3)
stfs f1, 8(r3)
stfs f2, 4(r3)
stfs f3, 0(r3)
blr
llvm-svn: 24484
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generates it. Make MVT::Vector expand-only, and remove the code in
Legalize that attempts to legalize it.
The plan for supporting N x Type is to continually epxand it in ExpandOp
until it gets down to 2 x Type, where it will be scalarized into a pair of
scalars.
llvm-svn: 24482
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break control dependence.
llvm-svn: 24437
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