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path: root/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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* If a target specified a stack pointer with setStackPointerRegisterToSaveRestore,Chris Lattner2006-01-131-5/+21
| | | | | | lower STACKSAVE/STACKRESTORE into a copy from/to that register. llvm-svn: 25276
* Compile llvm.stacksave/restore into STACKSAVE/STACKRESTORE nodes, and allowChris Lattner2006-01-131-0/+58
| | | | | | targets to custom expand them as they desire. llvm-svn: 25273
* Allow custom lowering of DYNAMIC_STACKALLOC.Evan Cheng2006-01-111-7/+20
| | | | llvm-svn: 25224
* Add bswap, rotl, and rotr nodesNate Begeman2006-01-111-0/+18
| | | | | | | | | Add dag combiner code to recognize rotl, rotr Add ppc code to match rotl Targets should add rotl/rotr patterns if they have them llvm-svn: 25222
* silence a warningChris Lattner2006-01-101-1/+2
| | | | llvm-svn: 25184
* Fix an exponential function in libcall insertion to not be exponential. :)Chris Lattner2006-01-091-6/+10
| | | | llvm-svn: 25165
* * Allow custom lowering of ADD_PARTS, SUB_PARTS, SHL_PARTS, SRA_PARTS,Evan Cheng2006-01-091-11/+46
| | | | | | | and SRL_PARTS. * Fix a bug that caused *_PARTS to be custom lowered twice. llvm-svn: 25157
* Unbreak the build :(Chris Lattner2006-01-061-2/+2
| | | | llvm-svn: 25124
* Support for custom lowering of ISD::RET.Evan Cheng2006-01-061-0/+16
| | | | llvm-svn: 25116
* Added initial support for DEBUG_LABEL allowing debug specific labels to beJim Laskey2006-01-051-29/+55
| | | | | | inserted in the code. llvm-svn: 25104
* Applied some recommend changes from sabre. The dominate one beginning "let theJim Laskey2006-01-041-4/+4
| | | | | | | pass manager do it's thing." Fixes crash when compiling -g files and suppresses dwarf statements if no debug info is present. llvm-svn: 25100
* Add unique id to debug location for debug label use (work in progress.)Jim Laskey2006-01-041-14/+21
| | | | llvm-svn: 25096
* Change how MachineDebugInfo is fetched.Jim Laskey2006-01-041-1/+1
| | | | llvm-svn: 25089
* allow custom lowering to return null for legal resultsAndrew Lenharth2005-12-251-17/+15
| | | | llvm-svn: 25007
* Support Custom lowering of a few more operations.Andrew Lenharth2005-12-241-5/+31
| | | | | | Alpha needs to custom lower *DIV and *REM llvm-svn: 25006
* unbreak the build :-/Chris Lattner2005-12-231-3/+3
| | | | llvm-svn: 24992
* Allow custom lowering of LOAD, EXTLOAD, ZEXTLOAD, STORE, and TRUNCSTORE. NotEvan Cheng2005-12-231-15/+84
| | | | | | currently used. llvm-svn: 24988
* Fix a pastoChris Lattner2005-12-231-2/+3
| | | | llvm-svn: 24973
* fix a thinko in the bit_convert handling codeChris Lattner2005-12-231-2/+1
| | | | llvm-svn: 24972
* add very simple support for the BIT_CONVERT nodeChris Lattner2005-12-231-2/+50
| | | | llvm-svn: 24970
* remove dead codeChris Lattner2005-12-221-6/+0
| | | | llvm-svn: 24965
* The 81st column doesn't like code in it.Chris Lattner2005-12-221-3/+4
| | | | llvm-svn: 24943
* Disengage DEBUG_LOC from non-PPC targets.Jim Laskey2005-12-211-12/+16
| | | | llvm-svn: 24919
* * Added support for X86 RET with an additional operand to specify number ofEvan Cheng2005-12-211-0/+10
| | | | | | | bytes to pop off stack. * Added support for X86 SETCC. llvm-svn: 24917
* make sure to relegalize all casesChris Lattner2005-12-211-1/+1
| | | | llvm-svn: 24911
* fix a bug I introduced that broke recursive expansion of nodes (e.g. ↵Chris Lattner2005-12-211-3/+6
| | | | | | scalarizing vectors) llvm-svn: 24905
* Fix a nasty latent bug in the legalizer that was triggered by my patchChris Lattner2005-12-201-22/+30
| | | | | | | | | | | last night, breaking crafty and twolf. Make sure that the newly found legal nodes are themselves not re-legalized until the next iteration. Also, since this functionality exists now, we can reduce number of legalizer iterations by depending on this behavior instead of having to misuse 'do another iteration' to get the same effect. llvm-svn: 24875
* X86 conditional branch support.Evan Cheng2005-12-191-0/+10
| | | | llvm-svn: 24870
* Make sure to relegalize new nodesChris Lattner2005-12-181-11/+21
| | | | llvm-svn: 24843
* More corrections for flagged copyto/from regChris Lattner2005-12-181-8/+11
| | | | llvm-svn: 24828
* legalize copytoreg and copyfromreg nodes that have flag operands correctly.Chris Lattner2005-12-181-11/+34
| | | | llvm-svn: 24826
* allow custom expansion of BR_CCChris Lattner2005-12-171-11/+25
| | | | llvm-svn: 24804
* X86 lowers SELECT to a cmp / test followed by a conditional move.Evan Cheng2005-12-171-0/+10
| | | | llvm-svn: 24754
* Added source file/line correspondence for dwarf (PowerPC only at this point.)Jim Laskey2005-12-161-3/+34
| | | | llvm-svn: 24748
* Lowering constant pool entries on ppc exposed a bug in the recently addedNate Begeman2005-12-131-1/+1
| | | | | | | ConstantVec legalizing code, which would return constantpool nodes that were not of the target's pointer type. llvm-svn: 24691
* Fix CodeGen/Generic/2005-12-12-ExpandSextInreg.llChris Lattner2005-12-121-0/+10
| | | | llvm-svn: 24677
* Add support for TargetConstantPool nodes to the dag isel emitter, and useNate Begeman2005-12-101-1/+3
| | | | | | | them in the PPC backend, to simplify some logic out of Select and SelectAddr. llvm-svn: 24657
* Teach legalize how to promote sext_inreg to fix a problem Andrew pointedChris Lattner2005-12-091-0/+5
| | | | | | out to me. llvm-svn: 24644
* Fix a crash where ConstantVec nodes were being generated with the wrongNate Begeman2005-12-071-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | type when the target did not support them. Also teach Legalize how to expand ConstantVecs. This allows us to generate _test: lwz r2, 12(r3) lwz r4, 8(r3) lwz r5, 4(r3) lwz r6, 0(r3) addi r2, r2, 4 addi r4, r4, 3 addi r5, r5, 2 addi r6, r6, 1 stw r2, 12(r3) stw r4, 8(r3) stw r5, 4(r3) stw r6, 0(r3) blr For: void %test(%v4i *%P) { %T = load %v4i* %P %S = add %v4i %T, <int 1, int 2, int 3, int 4> store %v4i %S, %v4i * %P ret void } On PowerPC. llvm-svn: 24633
* Teach the SelectionDAG ISel how to turn ConstantPacked values intoNate Begeman2005-12-061-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | constant nodes with vector types. Also teach the asm printer how to print ConstantPacked constant pool entries. This allows us to generate altivec code such as the following, which adds a vector constantto a packed float. LCPI1_0: <4 x float> < float 0.0e+0, float 0.0e+0, float 0.0e+0, float 1.0e+0 > .space 4 .space 4 .space 4 .long 1065353216 ; float 1 .text .align 4 .globl _foo _foo: lis r2, ha16(LCPI1_0) la r2, lo16(LCPI1_0)(r2) li r4, 0 lvx v0, r4, r2 lvx v1, r4, r3 vaddfp v0, v1, v0 stvx v0, r4, r3 blr For the llvm code: void %foo(<4 x float> * %a) { entry: %tmp1 = load <4 x float> * %a; %tmp2 = add <4 x float> %tmp1, < float 0.0, float 0.0, float 0.0, float 1.0 > store <4 x float> %tmp2, <4 x float> *%a ret void } llvm-svn: 24616
* bah, must generate all resultsAndrew Lenharth2005-12-021-2/+8
| | | | llvm-svn: 24574
* cycle counter fixAndrew Lenharth2005-12-021-0/+6
| | | | llvm-svn: 24573
* Promote line and column number information for our friendly 64-bit targets.Chris Lattner2005-12-011-3/+10
| | | | llvm-svn: 24568
* At long last, you can say that f32 isn't supported for setccAndrew Lenharth2005-11-301-1/+28
| | | | llvm-svn: 24537
* add support for custom lowering SINT_TO_FPAndrew Lenharth2005-11-301-0/+13
| | | | llvm-svn: 24531
* Add support for a new STRING and LOCATION node for line number support, patchChris Lattner2005-11-291-0/+27
| | | | | | contributed by Daniel Berlin, with a few cleanups here and there by me. llvm-svn: 24515
* Add the majority of the vector machien value types we expect to support,Nate Begeman2005-11-291-2/+2
| | | | | | | and make a few changes to the legalization machinery to support more than 16 types. llvm-svn: 24511
* Check in code to scalarize arbitrarily wide packed types for some simpleNate Begeman2005-11-221-3/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | vector operations (load, add, sub, mul). This allows us to codegen: void %foo(<4 x float> * %a) { entry: %tmp1 = load <4 x float> * %a; %tmp2 = add <4 x float> %tmp1, %tmp1 store <4 x float> %tmp2, <4 x float> *%a ret void } on ppc as: _foo: lfs f0, 12(r3) lfs f1, 8(r3) lfs f2, 4(r3) lfs f3, 0(r3) fadds f0, f0, f0 fadds f1, f1, f1 fadds f2, f2, f2 fadds f3, f3, f3 stfs f0, 12(r3) stfs f1, 8(r3) stfs f2, 4(r3) stfs f3, 0(r3) blr llvm-svn: 24484
* Rather than attempting to legalize 1 x float, make sure the SD ISel neverNate Begeman2005-11-221-42/+0
| | | | | | | | | | | generates it. Make MVT::Vector expand-only, and remove the code in Legalize that attempts to legalize it. The plan for supporting N x Type is to continually epxand it in ExpandOp until it gets down to 2 x Type, where it will be scalarized into a pair of scalars. llvm-svn: 24482
* Legalize MERGE_VALUES, expand READCYCLECOUNTER correctly, so it doesn'tChris Lattner2005-11-201-8/+13
| | | | | | break control dependence. llvm-svn: 24437
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