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path: root/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h
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* [SelectionDAG] Enhance the simplification of `copyto` from `implicit-def`.Michael Liao2019-05-271-5/+0
* [AMDGPU] Divergence driven ISel. Assign register class for cross block va...Alexander Timofeev2019-05-261-1/+1
* Revert r361644, "[AMDGPU] Divergence driven ISel. Assign register class for c...Peter Collingbourne2019-05-251-1/+1
* [AMDGPU] Divergence driven ISel. Assign register class for cross block values...Alexander Timofeev2019-05-241-1/+1
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [DebugInfo] Convert intrinsic llvm.dbg.label to MachineInstr.Shiva Chen2018-05-091-0/+3
* Pass DebugLoc and SDLoc by const ref.Benjamin Kramer2016-06-121-2/+2
* Minor code cleanup. NFC.Junmo Park2016-03-261-1/+1
* [SDAG] Give InstrEmitter hidden visibilityBenjamin Kramer2015-07-011-1/+1
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-231-1/+1
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-191-1/+1
* Remove the uses of getSubtargetImpl from InstrEmitter and removeEric Christopher2014-10-091-1/+0
* Canonicalize header guards into a common format.Benjamin Kramer2014-08-131-2/+2
* Revert "Give internal classes hidden visibility."Benjamin Kramer2013-09-111-1/+1
* Give internal classes hidden visibility.Benjamin Kramer2013-09-111-1/+1
* Add -*- C++ -*- to InstrEmitter.h.Michael Gottesman2013-07-171-1/+1
* Use MachineInstrBuilder in InstrEmitter.Jakob Stoklund Olesen2012-12-201-3/+7
* Change TargetLowering::getRegClassFor to take an MVT, instead of EVT.Patrik Hagglund2012-12-131-1/+1
* Revert EVT->MVT changes, r169836-169851, due to buildbot failures.Patrik Hagglund2012-12-111-1/+1
* Change TargetLowering::getRegClassFor to take an MVT, instead of EVT.Patrik Hagglund2012-12-111-1/+1
* Sort includes for all of the .h files under the 'lib' tree. These wereChandler Carruth2012-12-041-2/+2
* Allow trailing physreg RegisterSDNode operands on non-variadic instructions.Jakob Stoklund Olesen2012-07-041-6/+0
* Simplify EXTRACT_SUBREG emission.Jakob Stoklund Olesen2011-10-051-0/+6
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-4/+4
* Don't set kill flags for instructions which the scheduler has cloned.Dan Gohman2010-05-141-4/+6
* Teach scheduler about REG_SEQUENCE.Evan Cheng2010-05-041-0/+3
* Get rid of the EdgeMapping map. Instead, just check for BasicBlockDan Gohman2010-05-011-5/+3
* EmitDbgValue doesn't need its EdgeMapping argument.Dan Gohman2010-04-301-2/+1
* - Move TargetLowering::EmitTargetCodeForFrameDebugValue to TargetInstrInfo an...Evan Cheng2010-04-261-1/+0
* reapply 99444/99445, which I speculatively reverted inChris Lattner2010-03-251-1/+13
* Change how dbg_value sdnodes are converted into machine instructions. Their p...Evan Cheng2010-03-251-12/+10
* revert 99444/99445. This doesn't cause the failure of Chris Lattner2010-03-241-13/+1
* remove dead argument.Chris Lattner2010-03-241-3/+2
* split EmitNode in half to reduce indentation.Chris Lattner2010-03-241-1/+14
* Progress towards shepherding debug info through SelectionDAG.Dale Johannesen2010-03-101-1/+2
* Add some new bits of debug info handling. NoDale Johannesen2010-03-061-0/+11
* Fix a typo in a comment.Dan Gohman2009-11-161-1/+1
* Create a new InstrEmitter class for translating SelectionDAG nodesDan Gohman2009-10-101-0/+119
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