| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Reapply an improved version of r180816/180817. | Adrian Prantl | 2013-07-09 | 1 | -1/+7 |
| * | Debug Info: Simplify Frame Index handling in DBG_VALUE Machine Instructions | David Blaikie | 2013-06-16 | 1 | -2/+2 |
| * | Temporarily revert "Change the informal convention of DBG_VALUE so that we ca... | Adrian Prantl | 2013-04-30 | 1 | -7/+1 |
| * | Change the informal convention of DBG_VALUE so that we can express a | Adrian Prantl | 2013-04-30 | 1 | -1/+7 |
| * | Move all of the header files which are involved in modelling the LLVM IR | Chandler Carruth | 2013-01-02 | 1 | -1/+1 |
| * | Use MachineInstrBuilder in InstrEmitter. | Jakob Stoklund Olesen | 2012-12-20 | 1 | -76/+66 |
| * | Change TargetLowering::getRegClassFor to take an MVT, instead of EVT. | Patrik Hagglund | 2012-12-13 | 1 | -7/+9 |
| * | Revert EVT->MVT changes, r169836-169851, due to buildbot failures. | Patrik Hagglund | 2012-12-11 | 1 | -8/+6 |
| * | Change TargetLowering::getRegClassFor to take an MVT, instead of EVT. | Patrik Hagglund | 2012-12-11 | 1 | -6/+8 |
| * | Use the new script to sort the includes of every file under lib. | Chandler Carruth | 2012-12-03 | 1 | -4/+4 |
| * | [inline asm] Get the mayLoad/mayStore directly from the MIOp_ExtraInfo operand. | Chad Rosier | 2012-10-30 | 1 | -8/+2 |
| * | [inline asm] Implement mayLoad and mayStore for inline assembly. In general, | Chad Rosier | 2012-10-30 | 1 | -0/+7 |
| * | Move TargetData to DataLayout. | Micah Villmow | 2012-10-08 | 1 | -3/+3 |
| * | Fix PR11985 | Michael Liao | 2012-09-12 | 1 | -0/+1 |
| * | Remove an overly-aggressive assertion. The code following this assertion alr... | Owen Anderson | 2012-09-12 | 1 | -2/+0 |
| * | Add a new optimization pass: Stack Coloring, that merges disjoint static allo... | Nadav Rotem | 2012-09-06 | 1 | -0/+11 |
| * | Add MachineInstr::tieOperands, remove setIsTied(). | Jakob Stoklund Olesen | 2012-08-31 | 1 | -6/+2 |
| * | Don't enforce ordered inline asm operands. | Jakob Stoklund Olesen | 2012-08-31 | 1 | -10/+0 |
| * | Verify the order of tied operands in inline asm. | Jakob Stoklund Olesen | 2012-08-29 | 1 | -0/+12 |
| * | Set the isTied flags when building INLINEASM MachineInstrs. | Jakob Stoklund Olesen | 2012-08-29 | 1 | -4/+21 |
| * | Avoid including explicit uses when counting SDNode imp-uses. | Jakob Stoklund Olesen | 2012-08-24 | 1 | -3/+6 |
| * | Add SelectionDAG::getTargetIndex. | Jakob Stoklund Olesen | 2012-08-07 | 1 | -0/+4 |
| * | InstrEmitter::EmitSubregNode() optimize extract_subreg in this case: | Evan Cheng | 2012-07-11 | 1 | -1/+2 |
| * | Allow trailing physreg RegisterSDNode operands on non-variadic instructions. | Jakob Stoklund Olesen | 2012-07-04 | 1 | -7/+27 |
| * | Clear kill flags in InstrEmitter::EmitSubregNode(). | Jakob Stoklund Olesen | 2012-06-29 | 1 | -0/+1 |
| * | Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass(). | Jakob Stoklund Olesen | 2012-05-07 | 1 | -3/+3 |
| * | Added TargetRegisterInfo::getAllocatableClass. | Andrew Trick | 2012-05-03 | 1 | -6/+10 |
| * | Don't crash when a glue node contains an internal CopyToReg | Hal Finkel | 2012-02-24 | 1 | -0/+3 |
| * | Handle all live physreg defs in the same place. | Jakob Stoklund Olesen | 2012-02-03 | 1 | -43/+46 |
| * | More dead code removal (using -Wunreachable-code) | David Blaikie | 2012-01-20 | 1 | -2/+0 |
| * | Add a RegisterMaskSDNode class. | Jakob Stoklund Olesen | 2012-01-18 | 1 | -0/+2 |
| * | Fix ISD::REG_SEQUENCE to accept physical registers and change TwoAddressInstr... | Pete Cooper | 2012-01-18 | 1 | -7/+12 |
| * | Add bundle aware API for querying instruction properties and switch the code | Evan Cheng | 2011-12-07 | 1 | -1/+1 |
| * | Simplify EXTRACT_SUBREG emission. | Jakob Stoklund Olesen | 2011-10-05 | 1 | -27/+46 |
| * | Simplify INSERT_SUBREG emission. | Jakob Stoklund Olesen | 2011-10-05 | 1 | -27/+19 |
| * | Move getCommonSubClass() into TRI. | Jakob Stoklund Olesen | 2011-09-30 | 1 | -1/+2 |
| * | Constrain register classes instead of emitting copies. | Jakob Stoklund Olesen | 2011-09-22 | 1 | -3/+5 |
| * | Lower ARM adds/subs to add/sub after adding optional CPSR operand. | Andrew Trick | 2011-09-21 | 1 | -0/+2 |
| * | Restore hasPostISelHook tblgen flag. | Andrew Trick | 2011-09-20 | 1 | -1/+2 |
| * | ARM isel bug fix for adds/subs operands. | Andrew Trick | 2011-09-20 | 1 | -2/+1 |
| * | whitespace | Andrew Trick | 2011-09-20 | 1 | -26/+26 |
| * | Follow up to r138791. | Evan Cheng | 2011-08-30 | 1 | -0/+4 |
| * | land David Blaikie's patch to de-constify Type, with a few tweaks. | Chris Lattner | 2011-07-18 | 1 | -1/+1 |
| * | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng | 2011-06-28 | 1 | -16/+16 |
| * | More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo. | Evan Cheng | 2011-06-27 | 1 | -3/+3 |
| * | Distinguish early clobber output operands from clobbered registers. | Jakob Stoklund Olesen | 2011-06-27 | 1 | -0/+1 |
| * | Handle debug info for i128 constants. | Devang Patel | 2011-06-24 | 1 | -6/+2 |
| * | Don't use register classes larger than TLI->getRegClassFor(VT). | Jakob Stoklund Olesen | 2011-06-16 | 1 | -2/+7 |
| * | Change the REG_SEQUENCE SDNode to take an explict register class ID as its fi... | Owen Anderson | 2011-06-16 | 1 | -5/+6 |
| * | Use TRI::has{Sub,Super}ClassEq() where possible. | Jakob Stoklund Olesen | 2011-06-02 | 1 | -1/+1 |
