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path: root/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
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* Try to reduce the compile time impact of r161232.Bob Wilson2012-08-031-4/+3
| | | | | | | | | | | | The previous change caused fast isel to not attempt handling any calls to builtin functions. That included things like "printf" and caused some noticable regressions in compile time. I wanted to avoid having fast isel keep a separate list of functions that had to be kept in sync with what the code in SelectionDAGBuilder.cpp was handling. I've resolved that here by moving the list into TargetLibraryInfo. This is somewhat redundant in SelectionDAGBuilder but it will ensure that we keep things consistent. llvm-svn: 161263
* Fall back to selection DAG isel for calls to builtin functions.Bob Wilson2012-08-031-2/+17
| | | | | | | | | | Fast isel doesn't currently have support for translating builtin function calls to target instructions. For embedded environments where the library functions are not available, this is a matter of correctness and not just optimization. Most of this patch is just arranging to make the TargetLibraryInfo available in fast isel. <rdar://problem/12008746> llvm-svn: 161232
* Whitespace.Chad Rosier2012-07-061-3/+3
| | | | llvm-svn: 159839
* [fast-isel] Tell fast-isel to do nothing with the new donothing intrinsic.Chad Rosier2012-07-061-0/+3
| | | | llvm-svn: 159837
* Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp andBill Wendling2012-06-281-1/+1
| | | | | | | | | include/llvm/Analysis/DebugInfo.h to include/llvm/DebugInfo.h. The reasoning is because the DebugInfo module is simply an interface to the debug info MDNodes and has nothing to do with analysis. llvm-svn: 159312
* ARM: properly handle alignment for struct byval.Manman Ren2012-06-011-0/+24
| | | | | | | | | Factor out the expansion code into a function. This change is to be enabled in clang. rdar://9877866 llvm-svn: 157830
* Properly constrain register classes for sub-registers.Jakob Stoklund Olesen2012-05-201-0/+2
| | | | | | Not all GR64 registers have sub_8bit sub-registers. llvm-svn: 157150
* Revert 156658.Chad Rosier2012-05-111-2/+1
| | | | llvm-svn: 156662
* [fast-isel] Fast-isel doesn't use the expect intrinsic.Chad Rosier2012-05-111-1/+2
| | | | llvm-svn: 156658
* To ensure that we have more accurate line information for a blockEric Christopher2012-04-101-2/+5
| | | | | | | | | don't elide the branch instruction if it's the only one in the block, otherwise it's ok. PR9796 and rdar://11215207 llvm-svn: 154417
* If we have a VLA that has a "use" in a metadata node that's then usedBill Wendling2012-03-301-1/+12
| | | | | | | | | | | | | | | | here but it has no other uses, then we have a problem. E.g., int foo (const int *x) { char a[*x]; return 0; } If we assign 'a' a vreg and fast isel later on has to use the selection DAG isel, it will want to copy the value to the vreg. However, there are no uses, which goes counter to what selection DAG isel expects. <rdar://problem/11134152> llvm-svn: 153705
* [fast-isel] Fold "urem x, pow2" -> "and x, pow2-1". This should fix the 271%Chad Rosier2012-03-221-0/+7
| | | | | | | | | execution-time regression for nsieve-bits on the ARMv7 -O0 -g nightly tester. This may also improve compile-time on architectures that would otherwise generate a libcall for urem (e.g., ARM) or fall back to the DAG selector. rdar://10810716 llvm-svn: 153230
* Do everything up to generating code to try to get a register forEric Christopher2012-03-201-1/+6
| | | | | | | | | | a variable. The previous code would break the debug info changing code invariant. This will regress debug info for arguments where we elide the alloca created. Fixes rdar://11066468 llvm-svn: 153074
* Untabify.Eric Christopher2012-03-201-2/+2
| | | | llvm-svn: 153073
* Add another debugging statement here.Eric Christopher2012-03-201-0/+4
| | | | llvm-svn: 153072
* Use lookUpRegForValue here instead of duplicating the code.Eric Christopher2012-03-201-9/+2
| | | | llvm-svn: 153071
* We actually handle AllocaInst via getRegForValue below just fine.Eric Christopher2012-03-151-1/+1
| | | | | | Part of rdar://8905263 llvm-svn: 152845
* Add some debugging output into fast isel as well.Eric Christopher2012-03-151-2/+6
| | | | llvm-svn: 152844
* Properly emit _fltused with FastISel. Refactor to share code with SDAG.Michael J. Spencer2012-02-221-0/+3
| | | | | | Patch by Joe Groff! llvm-svn: 151183
* Make all pointers to TargetRegisterClass const since they are all pointers ↵Craig Topper2012-02-221-2/+2
| | | | | | to static data that should not be modified. llvm-svn: 151134
* Ignore the lifetime intrinsics in fast-isel.Eric Christopher2012-02-171-0/+4
| | | | llvm-svn: 150848
* [fast-isel] HandlePHINodesInSuccessorBlocks() can promite i8 and i16 types too.Chad Rosier2012-02-041-2/+2
| | | | llvm-svn: 149730
* Remove the now-dead llvm.eh.exception and llvm.eh.selector intrinsics.Bill Wendling2012-01-311-54/+0
| | | | llvm-svn: 149331
* [fast-isel] Remove SelectInsertValue() as fast-isel wasn't designed to handle Chad Rosier2011-12-131-103/+0
| | | | | | instructions that define aggregate types. llvm-svn: 146492
* [fast-isel] SelectInsertValue seems to be causing miscompiles for ARM. ↵Chad Rosier2011-12-101-0/+1
| | | | | | Disable while I investigate. llvm-svn: 146331
* Typo.Chad Rosier2011-12-101-1/+1
| | | | llvm-svn: 146327
* [fast-isel] Add support for selecting insertvalue.Chad Rosier2011-12-091-0/+102
| | | | | | rdar://10530851 llvm-svn: 146276
* If fast-isel fails, remove dead instructions generated during the failed Chad Rosier2011-11-291-0/+27
| | | | | | attempt. llvm-svn: 145425
* 80-column.Chad Rosier2011-11-281-2/+4
| | | | llvm-svn: 145267
* When fast iseling a GEP, accumulate the offset rather than emitting a series ofChad Rosier2011-11-171-11/+35
| | | | | | | | | | | | | ADDs. MaxOffs is used as a threshold to limit the size of the offset. Tradeoffs being: (1) If we can't materialize the large constant then we'll cause fast-isel to bail. (2) Too large of an offset can't be directly encoded in the ADD resulting in a MOV+ADD. Generally not a bad thing because otherwise we would have had ADD+ADD, but on Thumb this turns into a MOVS+MOVT+ADD. Working on a fix for that. (3) Conversely, too low of a threshold we'll miss opportunities to coalesce ADDs. rdar://10412592 llvm-svn: 144886
* Add fast-isel stats to determine who's doing all the work, the Chad Rosier2011-11-161-0/+7
| | | | | | target-independent selector or the target-specific selector. llvm-svn: 144833
* GEPs with all zero indices are trivially coalesced by fast-isel. For example,Chad Rosier2011-11-151-0/+5
| | | | | | | | | | | | | %arrayidx135 = getelementptr inbounds [4 x [4 x [4 x [4 x i32]]]]* %M0, i32 0, i64 0 %arrayidx136 = getelementptr inbounds [4 x [4 x [4 x i32]]]* %arrayidx135, i32 0, i64 %idxprom134 Prior to this commit, the GEP instruction that defines %arrayidx136 thought that %arrayidx135 was a trivial kill. The GEP that defines %arrayidx135 doesn't generate any code and thus %M0 gets folded into the second GEP. Thus, we need to look through GEPs with all zero indices. rdar://10443319 llvm-svn: 144730
* Fix a thinko that Nick noticed. The previous code actually worked asDan Gohman2011-10-121-1/+1
| | | | | | intended, but only by accident. llvm-svn: 141779
* Directly point debug info to the stack slot of the arugment, instead of ↵Devang Patel2011-09-081-7/+4
| | | | | | trying to keep track of vreg in which it the arugment is copied. The LiveDebugVariable can keep track of variable's ranges. llvm-svn: 139330
* FastISel: avoid function calls between the materialization of the constant ↵Ivan Krasin2011-08-181-5/+20
| | | | | | and its use. llvm-svn: 137993
* Revert r135423.Devang Patel2011-07-191-22/+0
| | | | llvm-svn: 135454
* Add APInt(numBits, ArrayRef<uint64_t> bigVal) constructor to prevent future ↵Jeffrey Yasskin2011-07-181-1/+1
| | | | | | | | | ambiguity errors like the one corrected by r135261. Migrate all LLVM callers of the old constructor to the new one. llvm-svn: 135431
* During bottom up fast-isel, instructions emitted to materalize registers are ↵Devang Patel2011-07-181-0/+22
| | | | | | | | at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases. [take 2] llvm-svn: 135423
* land David Blaikie's patch to de-constify Type, with a few tweaks.Chris Lattner2011-07-181-4/+4
| | | | llvm-svn: 135375
* Convert InsertValueInst and ExtractValueInst APIs to use ArrayRef.Jay Foad2011-07-131-1/+1
| | | | llvm-svn: 135040
* Revert r133953 for now.Devang Patel2011-06-291-22/+0
| | | | llvm-svn: 134116
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-11/+11
| | | | | | | | sink them into MC layer. - Added MCInstrInfo, which captures the tablegen generated static data. Chang TargetInstrInfo so it's based off MCInstrInfo. llvm-svn: 134021
* During bottom up fast-isel, instructions emitted to materalize registers are ↵Devang Patel2011-06-271-0/+22
| | | | | | at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases. llvm-svn: 133953
* Handle debug info for i128 constants.Devang Patel2011-06-241-3/+8
| | | | llvm-svn: 133821
* PR10077: fix fast-isel of extractvalue of aggregate constants.Eli Friedman2011-06-061-1/+3
| | | | llvm-svn: 132676
* Rewrite fast-isel integer cast handling to handle more cases, and to be ↵Eli Friedman2011-05-251-26/+6
| | | | | | | | | | simpler and more consistent. The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts). rdar://9437928 . llvm-svn: 132099
* Make fast-isel work correctly s/uadd.with.overflow intrinsics.Eli Friedman2011-05-161-7/+7
| | | | llvm-svn: 131420
* Fix silly typo.Eli Friedman2011-05-161-1/+1
| | | | llvm-svn: 131419
* Basic fast-isel of extractvalue. Not too helpful on its own, given the IR ↵Eli Friedman2011-05-161-0/+42
| | | | | | clang generates for cases like this, but it should become more useful soon. llvm-svn: 131417
* Fix a FIXME by moving the fast-isel implementation of the objectsize ↵Eli Friedman2011-05-141-0/+10
| | | | | | intrinsic from the x86 code to the generic code. llvm-svn: 131332
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