| Commit message (Expand) | Author | Age | Files | Lines | 
| *  | Pattern match a setcc of boolean value with 0 as a truncate. | Rafael Espindola | 2012-04-09 | 1 | -9/+48 | 
| *  | Remove unnecessary type check when combining and/or/xor of swizzles. Move som... | Craig Topper | 2012-04-09 | 1 | -13/+12 | 
| *  | Remove unnecessary 'else' on an 'if' that always returns | Craig Topper | 2012-04-09 | 1 | -1/+2 | 
| *  | Optimize code slightly. No functionality change. | Craig Topper | 2012-04-09 | 1 | -6/+7 | 
| *  | Replace some explicit checks with asserts for conditions that should never ha... | Craig Topper | 2012-04-09 | 1 | -14/+7 | 
| *  | Silence sign-compare warning. | Benjamin Kramer | 2012-04-08 | 1 | -1/+1 | 
| *  | Only have codegen turn fdiv by a constant into fmul by the reciprocal | Duncan Sands | 2012-04-08 | 1 | -5/+3 | 
| *  | 1. Remove the part of r153848 which optimizes shuffle-of-shuffle into a new | Nadav Rotem | 2012-04-07 | 1 | -12/+14 | 
| *  | Convert floating point division by a constant into multiplication by the | Duncan Sands | 2012-04-07 | 1 | -0/+13 | 
| *  | Always compute all the bits in ComputeMaskedBits. | Rafael Espindola | 2012-04-04 | 1 | -15/+10 | 
| *  | Add predicates for checking whether targets have free FNEG and FABS operation... | Owen Anderson | 2012-04-02 | 1 | -3/+5 | 
| *  | Optimizing swizzles of complex shuffles may generate additional complex shuff... | Nadav Rotem | 2012-04-02 | 1 | -1/+9 | 
| *  | This commit contains a few changes that had to go in together. | Nadav Rotem | 2012-04-01 | 1 | -0/+92 | 
| *  | fix what looks like a real logic bug, found by PVS-Studio (part of PR12357) | Chris Lattner | 2012-03-27 | 1 | -2/+2 | 
| *  | When combining (vextract shuffle (load ), <1,u,u,u>), 0) -> (load ), add user... | Craig Topper | 2012-03-20 | 1 | -0/+1 | 
| *  | Fix DAG combine which creates illegal vector shuffles.  Patch by Heikki Kultala. | Duncan Sands | 2012-03-19 | 1 | -0/+6 | 
| *  | When optimizing certain BUILD_VECTOR nodes into other BUILD_VECTOR nodes, add... | Nadav Rotem | 2012-03-15 | 1 | -0/+4 | 
| *  | Add a xform to the DAG combiner. | Bill Wendling | 2012-03-15 | 1 | -0/+17 | 
| *  | Fortify r152675 a bit. Although I'm not able to come up with a test case that... | Evan Cheng | 2012-03-13 | 1 | -3/+11 | 
| *  | DAG combine incorrectly optimize (i32 vextract (v4i16 load $addr), c) to | Evan Cheng | 2012-03-13 | 1 | -4/+19 | 
| *  | Give dagcombiner's worklist some inline capacity. | Benjamin Kramer | 2012-03-10 | 1 | -3/+2 | 
| *  | Extend r148086 to check for [r +/- reg] address mode. This fixes queens perfo... | Evan Cheng | 2012-03-06 | 1 | -4/+7 | 
| *  | Make it possible for a target to mark FSUB as Expand.  This requires providin... | Owen Anderson | 2012-03-06 | 1 | -16/+29 | 
| *  | Teach the DAGCombiner that certain loadext nodes followed by ANDs can be conv... | James Molloy | 2012-02-20 | 1 | -0/+82 | 
| *  | Remove extraneous #include and spelling mistake introduced in r150669. | James Molloy | 2012-02-16 | 1 | -2/+1 | 
| *  | Modify the algorithm when traversing the DAGCombiner's worklist to be O(log N... | James Molloy | 2012-02-16 | 1 | -13/+36 | 
| *  | Fix a bug in DAGCombine for the optimization of BUILD_VECTOR. We cant generat... | Nadav Rotem | 2012-02-13 | 1 | -2/+6 | 
| *  | This patch addresses the problem of poor code generation for the zext | Nadav Rotem | 2012-02-12 | 1 | -14/+29 | 
| *  | Add additional documentation to the extract-and-trunc dagcombine optimization. | Nadav Rotem | 2012-02-05 | 1 | -3/+8 | 
| *  | The type-legalizer often scalarizes code. One of the common patterns is extra... | Nadav Rotem | 2012-02-03 | 1 | -0/+34 | 
| *  | Transform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) -> EXTRACT_VECTOR_ELT. | Nadav Rotem | 2012-01-17 | 1 | -4/+35 | 
| *  | Teach DAG combiner to turn a BUILD_VECTOR of UNDEFs into an UNDEF of vector t... | Craig Topper | 2012-01-17 | 1 | -4/+8 | 
| *  | DAGCombiner: Deduplicate code. | Benjamin Kramer | 2012-01-15 | 1 | -24/+14 | 
| *  | DAGCombine's logic for forming pre- and post- indexed loads / stores were being | Evan Cheng | 2012-01-13 | 1 | -9/+44 | 
| *  | Teach the X86 instruction selection to do some heroic transforms to | Chandler Carruth | 2012-01-11 | 1 | -0/+23 | 
| *  | Replace some uses of hasNUsesOfValue(0, X) with !hasAnyUseOfValue(X) | Craig Topper | 2012-01-07 | 1 | -4/+4 | 
| *  | Add some DAG combines for SUBC/SUBE. If nothing uses the carry/borrow out of ... | Craig Topper | 2012-01-07 | 1 | -2/+51 | 
| *  | Prevent a DAGCombine from firing where there are two uses of | Chandler Carruth | 2012-01-05 | 1 | -1/+3 | 
| *  | Implement VECTOR_SHUFFLE canonicalizations during DAG combine. | Craig Topper | 2012-01-04 | 1 | -2/+50 | 
| *  | Make sure DAGCombiner doesn't introduce multiple loads from the same memory l... | Eli Friedman | 2011-12-26 | 1 | -1/+23 | 
| *  | Initial CodeGen support for CTTZ/CTLZ where a zero input produces an | Chandler Carruth | 2011-12-13 | 1 | -0/+24 | 
| *  | Zap unnecessary isIntDivCheap() check.  PR11485.  No testcase because this do... | Eli Friedman | 2011-12-07 | 1 | -1/+1 | 
| *  | Fix an optimization involving EXTRACT_SUBVECTOR in DAGCombine so it behaves c... | Eli Friedman | 2011-12-07 | 1 | -13/+17 | 
| *  | Move global variables in TargetMachine into new TargetOptions class. As an API | Nick Lewycky | 2011-12-02 | 1 | -30/+49 | 
| *  | Revert r145273 and fix in SelectionDAG::InferPtrAlignment() instead. | Evan Cheng | 2011-11-28 | 1 | -26/+12 | 
| *  | DAG combine should not increase alignment of loads / stores with alignment less | Evan Cheng | 2011-11-28 | 1 | -12/+26 | 
| *  | Make sure to replace the chain properly when DAGCombining a LOAD+EXTRACT_VECT... | Eli Friedman | 2011-11-16 | 1 | -4/+17 | 
| *  | Remove some unnecessary includes of PseudoSourceValue.h. | Jay Foad | 2011-11-15 | 1 | -1/+0 | 
| *  | Don't try to form pre/post-indexed loads/stores until after LegalizeDAG runs.... | Eli Friedman | 2011-11-12 | 1 | -7/+7 | 
| *  | Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported. | Lang Hames | 2011-11-08 | 1 | -0/+10 |