| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Revert r227242 - Merge vector stores into wider vector stores (PR21711). | Quentin Colombet | 2015-01-27 | 1 | -54/+30 |
| * | Merge vector stores into wider vector stores (PR21711) | Sanjay Patel | 2015-01-27 | 1 | -30/+54 |
| * | merge consecutive stores of extracted vector elements (PR21711) | Sanjay Patel | 2015-01-22 | 1 | -92/+162 |
| * | [DAGCombine] Produce better code for constant splats | Michael Kuperstein | 2015-01-22 | 1 | -1/+19 |
| * | Revert r226811, MSVC accepts code sane compilers don't. | Michael Kuperstein | 2015-01-22 | 1 | -19/+1 |
| * | [DAGCombine] Produce better code for constant splats | Michael Kuperstein | 2015-01-22 | 1 | -1/+19 |
| * | Fixed a bug in type legalizer for masked load/store intrinsics. | Elena Demikhovsky | 2015-01-22 | 1 | -6/+10 |
| * | Fixed a comment | Elena Demikhovsky | 2015-01-22 | 1 | -1/+1 |
| * | Fixed a bug in narrowing store operation. | Elena Demikhovsky | 2015-01-22 | 1 | -2/+5 |
| * | DAGCombine: fold (or (and X, M), (and X, N)) -> (and X, (or M, N)) | Tim Northover | 2015-01-21 | 1 | -0/+11 |
| * | Revert "DAGCombine: fold (or (and X, M), (and X, N)) -> (and X, (or M, N))" | Tim Northover | 2015-01-21 | 1 | -11/+0 |
| * | DAGCombine: fold (or (and X, M), (and X, N)) -> (and X, (or M, N)) | Tim Northover | 2015-01-21 | 1 | -0/+11 |
| * | Improve DAG combine pass on certain IR vector patterns | Mehdi Amini | 2015-01-17 | 1 | -1/+14 |
| * | [cleanup] Re-sort all the #include lines in LLVM using | Chandler Carruth | 2015-01-14 | 1 | -1/+1 |
| * | DAG Combiner: Fold SelectCC When Cond is UNDEF | Mehdi Amini | 2015-01-14 | 1 | -4/+7 |
| * | DAGCombiner: simplify by using condition variables; NFC | Matthias Braun | 2015-01-13 | 1 | -16/+12 |
| * | R600: Implement getRecipEstimate | Matt Arsenault | 2015-01-13 | 1 | -1/+2 |
| * | Added TLI hook for isFPExtFree. Some of the FMA combine heuristics are now gu... | Olivier Sallenave | 2015-01-13 | 1 | -63/+70 |
| * | Combine fcmp + select to fminnum / fmaxnum if no nans and legal | Matt Arsenault | 2015-01-13 | 1 | -0/+59 |
| * | [DAGCombine] Remainder of fix to r225380 (More FMA folding opportunities) | Hal Finkel | 2015-01-09 | 1 | -10/+24 |
| * | Partial fix to r225380 (More FMA folding opportunities) | Hal Finkel | 2015-01-09 | 1 | -96/+95 |
| * | [SelectionDAG] Allow targets to specify legality of extloads' result | Ahmed Bougacha | 2015-01-08 | 1 | -26/+29 |
| * | More FMA folding opportunities. | Olivier Sallenave | 2015-01-07 | 1 | -1/+133 |
| * | Test commit | Olivier Sallenave | 2015-01-07 | 1 | -0/+1 |
| * | Replace several 'assert(false' with 'llvm_unreachable' or fold a condition in... | Craig Topper | 2015-01-05 | 1 | -1/+1 |
| * | Revert "merge consecutive stores of extracted vector elements" | Alexey Samsonov | 2014-12-31 | 1 | -75/+4 |
| * | Always assert in DAGCombine and not only when -debug is enabled | Mehdi Amini | 2014-12-23 | 1 | -5/+6 |
| * | [DagCombine] Improve DAGCombiner BUILD_VECTOR when it has two sources of elem... | Michael Kuperstein | 2014-12-23 | 1 | -12/+22 |
| * | merge consecutive stores of extracted vector elements | Sanjay Patel | 2014-12-19 | 1 | -4/+75 |
| * | [DAGCombine] Slightly improve lowering of BUILD_VECTOR into a shuffle. | Michael Kuperstein | 2014-12-17 | 1 | -11/+22 |
| * | Add target hook for whether it is profitable to reduce load widths | Matt Arsenault | 2014-12-12 | 1 | -0/+3 |
| * | Fix a few instances found in SelectionDAG where we were not handling F16 at p... | Owen Anderson | 2014-12-09 | 1 | -2/+0 |
| * | [InstCombine] Minor optimization for bswap with binary ops | Simon Pilgrim | 2014-12-04 | 1 | -0/+2 |
| * | Masked Load / Store Intrinsics - the CodeGen part. | Elena Demikhovsky | 2014-12-04 | 1 | -0/+160 |
| * | Revert "Masked Vector Load and Store Intrinsics." | Duncan P. N. Exon Smith | 2014-11-28 | 1 | -161/+0 |
| * | Masked Vector Load and Store Intrinsics. | Elena Demikhovsky | 2014-11-23 | 1 | -0/+161 |
| * | [DAG] Teach how to turn a build_vector into a shuffle if some of the operands... | Andrea Di Biagio | 2014-11-21 | 1 | -11/+39 |
| * | [DAG] Refactor the shuffle combining logic in DAGCombiner. NFC. | Andrea Di Biagio | 2014-11-21 | 1 | -153/+73 |
| * | DAGCombiner: Allow the DAGCombiner to combine multiple FDIVs with the same di... | Hao Liu | 2014-11-21 | 1 | -0/+38 |
| * | Update SetVector to rely on the underlying set's insert to return a pair<iter... | David Blaikie | 2014-11-19 | 1 | -3/+4 |
| * | Fix optimisations of SELECT_CC which assumed result is boolean | Oliver Stannard | 2014-11-17 | 1 | -2/+5 |
| * | [DAG] Improved target independent vector shuffle folding logic. | Andrea Di Biagio | 2014-11-15 | 1 | -0/+20 |
| * | LLVM incorrectly folds xor into select | Oliver Stannard | 2014-11-11 | 1 | -1/+2 |
| * | [X86] Teach method 'isVectorClearMaskLegal' how to check for legal blend masks. | Andrea Di Biagio | 2014-11-05 | 1 | -1/+1 |
| * | Normally an 'optnone' function goes through fast-isel, which does not | Paul Robinson | 2014-11-03 | 1 | -0/+7 |
| * | Fix incorrect invariant check in DAG Combine | Louis Gerbarg | 2014-10-30 | 1 | -1/+1 |
| * | Whitespace. | NAKAMURA Takumi | 2014-10-29 | 1 | -26/+26 |
| * | Use rsqrt (X86) to speed up reciprocal square root calcs | Sanjay Patel | 2014-10-24 | 1 | -40/+77 |
| * | Strength reduce constant-sized vectors into arrays. No functionality change. | Benjamin Kramer | 2014-10-22 | 1 | -2/+2 |
| * | Add minnum / maxnum codegen | Matt Arsenault | 2014-10-21 | 1 | -0/+46 |
