| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 84432
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llvm-svn: 83857
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is trivially rematerializable and integrate it into
TargetInstrInfo::isTriviallyReMaterializable. This way, all places that
need to know whether an instruction is rematerializable will get the
same answer.
This enables the useful parts of the aggressive-remat option by
default -- using AliasAnalysis to determine whether a memory location
is invariant, and removes the questionable parts -- rematting operations
with virtual register inputs that may not be live everywhere.
llvm-svn: 83687
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sdisel will use to properly complete phi nodes.
Not functionality change yet.
llvm-svn: 82273
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dependence edge latency for post-RA scheduling.
llvm-svn: 79425
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instruction index across each part. Instruction indices are used
to make live range queries, and live ranges can extend beyond
scheduling region boundaries.
Refactor the ScheduleDAGSDNodes class some more so that it
doesn't have to worry about this additional information.
llvm-svn: 64288
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scheduling, and generalize is so that preserves state across
scheduling regions. This fixes incorrect live-range information around
terminators and labels, which are effective region boundaries.
In place of looking for terminators to anchor inter-block dependencies,
introduce special entry and exit scheduling units for this purpose.
llvm-svn: 64254
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that used this header to select a scheduling policy should
use SchedulerRegistry.h instead (llvm-gcc and clang were
updated a while ago).
llvm-svn: 63934
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