| Commit message (Expand) | Author | Age | Files | Lines |
* | It's better to have the arrays, which would trigger the creation of stack | Bill Wendling | 2010-07-27 | 1 | -1/+23 |
* | Fix batch of converting RegisterPass<> to INTIALIZE_PASS(). | Owen Anderson | 2010-07-21 | 1 | -2/+2 |
* | Clean up scavengeRegister() a bit to prefer available regs, which allows | Jim Grosbach | 2010-07-08 | 1 | -15/+1 |
* | When processing frame index virtual registers, consider all available registers | Jim Grosbach | 2010-07-08 | 1 | -2/+12 |
* | Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill sl... | Evan Cheng | 2010-07-03 | 1 | -2/+1 |
* | Custom inserters (e.g., conditional moves in Thumb1 can introduce | Jim Grosbach | 2010-07-02 | 1 | -1/+14 |
* | Propagate the AlignStack bit in InlineAsm's to the | Dale Johannesen | 2010-07-02 | 1 | -3/+3 |
* | Remove the TargetRegisterClass member from CalleeSavedInfo | Rafael Espindola | 2010-06-02 | 1 | -12/+19 |
* | Remove uses of getCalleeSavedRegClasses from outside the | Rafael Espindola | 2010-06-02 | 1 | -7/+3 |
* | Implement @llvm.returnaddress. rdar://8015977. | Evan Cheng | 2010-05-22 | 1 | -2/+2 |
* | Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what | Bill Wendling | 2010-05-14 | 1 | -15/+15 |
* | Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. | Evan Cheng | 2010-05-06 | 1 | -4/+5 |
* | Reword a comment slightly. | Eric Christopher | 2010-05-03 | 1 | -1/+1 |
* | Make naked functions work on PPC. | Dale Johannesen | 2010-04-29 | 1 | -0/+4 |
* | Rename MachineFrameInfo variables to MFI, for consistency with | Dan Gohman | 2010-04-13 | 1 | -41/+41 |
* | remove the MMI pointer from MachineFrameInfo. | Chris Lattner | 2010-04-05 | 1 | -6/+0 |
* | Clear up the last (famous last words) frame index value reuse issues for Thumb1. | Jim Grosbach | 2010-03-10 | 1 | -6/+9 |
* | Change the Value argument to eliminateFrameIndex to a type-tagged value. This | Jim Grosbach | 2010-03-09 | 1 | -2/+3 |
* | Updated version of r96634 (which was reverted due to failing 176.gcc and | Jim Grosbach | 2010-02-22 | 1 | -3/+4 |
* | Revert 96634. It causes assertion failures for 126.gcc and 176.gcc in | Bob Wilson | 2010-02-19 | 1 | -4/+3 |
* | Radar 7636153. In the presence of large call frames, it's not sufficient | Jim Grosbach | 2010-02-19 | 1 | -3/+4 |
* | Teach MachineFrameInfo to track maximum alignment while stack objects are being | Evan Cheng | 2010-02-13 | 1 | -13/+2 |
* | move target-independent opcodes out of TargetInstrInfo | Chris Lattner | 2010-02-09 | 1 | -1/+1 |
* | Remove dead store. | Bill Wendling | 2009-12-28 | 1 | -1/+1 |
* | Honour setHasCalls() set from isel. | Anton Korobeynikov | 2009-12-11 | 1 | -2/+2 |
* | improve portability to avoid conflicting with std::next in c++'0x. | Chris Lattner | 2009-12-03 | 1 | -1/+1 |
* | Add a bool flag to StackObjects telling whether they reference spill | David Greene | 2009-11-12 | 1 | -1/+2 |
* | When the function is doing dynamic stack realignment, the spill slot will be | Jim Grosbach | 2009-10-29 | 1 | -2/+2 |
* | Cleanup of frame index scavenging. Better code flow and more accurately | Jim Grosbach | 2009-10-21 | 1 | -35/+60 |
* | Better handle instructions that re-def a scratch register | Jim Grosbach | 2009-10-20 | 1 | -9/+18 |
* | Register re-use for scavenged frame indices must check for re-deginition | Jim Grosbach | 2009-10-20 | 1 | -0/+4 |
* | Enable post-pass frame index register scavenging for ARM and Thumb2 | Jim Grosbach | 2009-10-20 | 1 | -5/+0 |
* | Distinquish stack slots from other stack objects. They (and fixed objects) ge... | Evan Cheng | 2009-10-17 | 1 | -1/+1 |
* | Make loop not recalc getNumOperands() each time around | Jim Grosbach | 2009-10-14 | 1 | -3/+2 |
* | quiet compiler warning | Jim Grosbach | 2009-10-14 | 1 | -1/+1 |
* | when previous scratch register is killed, flag the value as no longer tracking | Jim Grosbach | 2009-10-09 | 1 | -1/+4 |
* | Re-enable register scavenging in Thumb1 by default. | Jim Grosbach | 2009-10-08 | 1 | -10/+1 |
* | bugfix. The target may use virtual registers that aren't tracked for re-use b... | Jim Grosbach | 2009-10-08 | 1 | -18/+26 |
* | reverting thumb1 scavenging default due to test failure while I figure out wh... | Jim Grosbach | 2009-10-07 | 1 | -1/+10 |
* | Enable thumb1 register scavenging by default. | Jim Grosbach | 2009-10-07 | 1 | -10/+1 |
* | grammar | Jim Grosbach | 2009-10-07 | 1 | -1/+1 |
* | add initializers for clarity. Add missing assignment of PrevLastUseOp. | Jim Grosbach | 2009-10-07 | 1 | -2/+3 |
* | Add register-reuse to frame-index register scavenging. When a target uses | Jim Grosbach | 2009-10-07 | 1 | -21/+120 |
* | Add additional assert() to verify no extraneous use of a scavenged register. | Jim Grosbach | 2009-09-30 | 1 | -2/+9 |
* | replace TRI->isVirtualRegister() with TargetRegisterInfo::isVirtualRegister() | Jim Grosbach | 2009-09-30 | 1 | -3/+1 |
* | fix compiler warning | Jim Grosbach | 2009-09-30 | 1 | -1/+1 |
* | Simplify the tracking of virtual frame index registers. Ranges cannot overlap, | Jim Grosbach | 2009-09-29 | 1 | -20/+31 |
* | Use explicit structs instead of std::pair to map callee saved regs to spill s... | Tilmann Scheller | 2009-09-27 | 1 | -4/+4 |
* | pr4926: ARM requires the stack pointer to be aligned, even for leaf functions. | Bob Wilson | 2009-09-25 | 1 | -14/+20 |
* | Start of revamping the register scavenging in PEI. ARM Thumb1 is the driving | Jim Grosbach | 2009-09-24 | 1 | -3/+62 |