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path: root/llvm/lib/CodeGen/PeepholeOptimizer.cpp
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* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-5/+8
* [PeepholeOptimzer] Fix a typo in a comment.Quentin Colombet2014-07-011-1/+1
* [PeepholeOptimizer] Advanced rewriting of copies to avoid cross register banksQuentin Colombet2014-07-011-13/+368
* [Modules] Remove potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
* [C++11] More 'nullptr' conversion. In some cases just using a boolean check i...Craig Topper2014-04-141-6/+6
* [CodeGen] Fix peephole optimizer bug introduced in r205481. Fixes PR19318.Lang Hames2014-04-031-9/+11
* [CodeGen] Teach the peephole optimizer to remember (and exploit) all foldingLang Hames2014-04-021-35/+44
* Disable each MachineFunctionPass for 'optnone' functions, unless thatPaul Robinson2014-03-311-0/+3
* Switch a number of loops in lib/CodeGen over to range-based for-loops, now thatOwen Anderson2014-03-171-13/+6
* Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changingOwen Anderson2014-03-131-7/+7
* Fix for http://llvm.org/bugs/show_bug.cgi?id=18590Ekaterina Romanova2014-03-131-3/+11
* [C++11] Add 'override' keyword to virtual methods that override their base cl...Craig Topper2014-03-071-2/+2
* Replace PROLOG_LABEL with a new CFI_INSTRUCTION.Rafael Espindola2014-03-071-1/+1
* [Peephole] Rewrite copies to avoid cross register banks copies.Quentin Colombet2013-09-131-84/+166
* Add debug prints for when optimizeLoadInstr folds a load.Craig Topper2012-12-171-0/+6
* Add comment for load foldingJoel Jones2012-12-111-0/+5
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-5/+5
* Make sure we iterate over newly created instructions. Fixes pr13625. Testcase toRafael Espindola2012-10-151-0/+5
* Use standard pattern for iterate+erase.Jakob Stoklund Olesen2012-08-171-9/+2
* Add an MCID::Select flag and TII hooks for optimizing selects.Jakob Stoklund Olesen2012-08-161-16/+27
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-08-021-14/+15
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-08-021-0/+57
* Revert r160920 and r160919 due to dragonegg and clang selfhost failureManman Ren2012-07-291-22/+0
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-07-281-0/+22
* Add SrcReg2 to analyzeCompare and optimizeCompareInstr to handle CompareManman Ren2012-06-291-4/+5
* Implement PPCInstrInfo::isCoalescableExtInstr().Jakob Stoklund Olesen2012-06-191-3/+19
* Style: Don't reuse variables for multiple purposes.Jakob Stoklund Olesen2012-06-191-8/+7
* Revert r157755.Manman Ren2012-06-061-1/+0
* X86: replace SUB with CMP if possibleManman Ren2012-05-311-0/+1
* Constrain regclasses in PeepholeOptimizer.Jakob Stoklund Olesen2012-05-201-1/+10
* ARM: peephole optimization to remove cmp instructionManman Ren2012-05-111-0/+9
* Revert: 156550 "ARM: peephole optimization to remove cmp instruction"Manman Ren2012-05-101-9/+0
* ARM: peephole optimization to remove cmp instructionManman Ren2012-05-101-0/+9
* Tidy up. Naming conventions.Jim Grosbach2012-05-011-16/+16
* Make the peephole optimizer clear kill flags on a vreg if it's about to add newLang Hames2012-02-251-0/+4
* Fixed typo.Lang Hames2012-02-251-1/+1
* Codegen pass definition cleanup. No functionality.Andrew Trick2012-02-081-4/+1
* whitespaceAndrew Trick2012-02-081-7/+7
* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-071-6/+4
* If MI is deleted then remove it from the set. If a new MI is created, it couldNick Lewycky2011-10-131-0/+2
* SrcDef is only written and never read. Remove it.Duncan Sands2011-07-261-8/+7
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-6/+6
* Add a peephole optimization to optimize pairs of bitcasts. e.g.Evan Cheng2011-03-151-4/+97
* Fix thinko. Cmp can be the first instruction in a MBB.Evan Cheng2011-02-151-2/+5
* Fix PR8854. Track inserted copies to avoid read before write. Sorry, it's har...Evan Cheng2011-02-141-4/+16
* Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.Jakob Stoklund Olesen2011-01-101-1/+1
* Do not model all INLINEASM instructions as having unmodelled side effects.Evan Cheng2011-01-071-1/+1
* DBG_VALUE does not have any side effects; it also makes no sense to mark it c...Evan Cheng2011-01-071-1/+3
* Remove ARM isel hacks that fold large immediates into a pair of add, sub, and,Evan Cheng2010-11-171-0/+62
* Code clean up. The peephole pass should be the one updating the instructionEvan Cheng2010-11-151-17/+15
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