summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/MachineVerifier.cpp
Commit message (Collapse)AuthorAgeFilesLines
...
* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-071-14/+14
| | | | | | | | | | | | | | generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. llvm-svn: 146026
* Remove all remaining uses of Value::getNameStr().Benjamin Kramer2011-11-151-1/+1
| | | | llvm-svn: 144648
* Use getVNInfoBefore() when it makes sense.Jakob Stoklund Olesen2011-11-141-3/+3
| | | | llvm-svn: 144517
* Rename SlotIndexes to match how they are used.Jakob Stoklund Olesen2011-11-131-9/+10
| | | | | | | | | | | | | | | | | | | | The old naming scheme (load/use/def/store) can be traced back to an old linear scan article, but the names don't match how slots are actually used. The load and store slots are not needed after the deferred spill code insertion framework was deleted. The use and def slots don't make any sense because we are using half-open intervals as is customary in C code, but the names suggest closed intervals. In reality, these slots were used to distinguish early-clobber defs from normal defs. The new naming scheme also has 4 slots, but the names match how the slots are really used. This is a purely mechanical renaming, but some of the code makes a lot more sense now. llvm-svn: 144503
* Fix sub-register operand verification.Jakob Stoklund Olesen2011-10-051-12/+25
| | | | | | | | | PhysReg operands are not allowed to have sub-register indices at all. For virtual registers with sub-reg indices, check that all registers in the register class support the sub-reg index. llvm-svn: 141220
* Verify that terminators follow non-terminators.Jakob Stoklund Olesen2011-09-231-0/+13
| | | | | | This exposes a -segmented-stacks bug. llvm-svn: 140429
* Lower ARM adds/subs to add/sub after adding optional CPSR operand.Andrew Trick2011-09-211-0/+3
| | | | | | | | | | | | | This is still a hack until we can teach tblgen to generate the optional CPSR operand rather than an implicit CPSR def. But the strangeness is now limited to the selection DAG. ADD/SUB MI's no longer have implicit CPSR defs, nor do we allow flag setting variants of these opcodes in machine code. There are several corner cases to consider, and getting one wrong would previously lead to nasty miscompilation. It's not the first time I've debugged one, so this time I added enough verification to ensure it won't happen again. llvm-svn: 140228
* Stop verifying hasPHIKill() flags.Jakob Stoklund Olesen2011-09-151-11/+1
| | | | | | | | | | There is only one legitimate use remaining, in addIntervalsForSpills(). All other calls to hasPHIKill() are only used to update PHIKill flags. The addIntervalsForSpills() function is part of the old spilling framework, only used by linearscan. llvm-svn: 139783
* Revert "Don't check liveness of unallocatable registers."Jakob Stoklund Olesen2011-07-301-9/+2
| | | | | | | The ARM target depends on CPSR liveness being tracked after register allocation. llvm-svn: 136548
* Don't check liveness of unallocatable registers.Jakob Stoklund Olesen2011-07-291-2/+9
| | | | | | | | | | | | This includes registers like EFLAGS and ST0-ST7. We don't check for liveness issues in the verifier and scavenger because registers will never be allocated from these classes. While in SSA form, we do care about the liveness of unallocatable unreserved registers. Liveness of EFLAGS and ST0 neds to be correct for MachineDCE and MachineSinking. llvm-svn: 136541
* Check for multiple defs in the machine code verifier.Jakob Stoklund Olesen2011-07-291-0/+5
| | | | llvm-svn: 136535
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-18/+19
| | | | | | | | sink them into MC layer. - Added MCInstrInfo, which captures the tablegen generated static data. Chang TargetInstrInfo so it's based off MCInstrInfo. llvm-svn: 134021
* More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo.Evan Cheng2011-06-271-4/+4
| | | | llvm-svn: 133944
* Use TRI::has{Sub,Super}ClassEq() where possible.Jakob Stoklund Olesen2011-06-021-1/+1
| | | | | | No functional change. llvm-svn: 132455
* Revert r128961 because it didn't include a test and causes the verifier to failCameron Zwarich2011-05-191-5/+0
| | | | | | | | on CodeGen/X86/2007-05-07-InvokeSRet.ll. There is probably a bug here that was fixed by r128961, but since there is no test or reference to a source file I have to revert it. llvm-svn: 131618
* SjLj EH could produce a machine basic block that legitimately has more than oneBill Wendling2011-05-041-1/+9
| | | | | | | | | | | | | landing pad as its successor. SjLj exception handling jumps to the correct landing pad via a switch statement that's generated right before code-gen. Loosen the constraint in the machine instruction verifier to allow for this. Note, this isn't the most rigorous check since we cannot determine where that switch statement came from. But it's marginally better than turning this check off when SjLj exceptions are used. <rdar://problem/9187612> llvm-svn: 130881
* Permit blocks to branch directly to a landing pad.Jakob Stoklund Olesen2011-04-051-0/+5
| | | | | | Treat the landing pad as a normal successor when that happens. llvm-svn: 128961
* Allow kill flags on two-address instructions. They are harmless.Jakob Stoklund Olesen2011-03-311-6/+2
| | | | llvm-svn: 128643
* Mark all uses as <undef> when joining a copy.Jakob Stoklund Olesen2011-03-311-5/+2
| | | | | | | | | | | | This way, shrinkToUses() will ignore the instruction that is about to be deleted, and we avoid leaving invalid live ranges that SplitKit doesn't like. Fix a misunderstanding in MachineVerifier about <def,undef> operands. The <undef> flag is valid on def operands where it has the same meaning as <undef> on a use operand. It only applies to sub-register defines which also read the full register. llvm-svn: 128642
* Verify kill flags conservatively.Jakob Stoklund Olesen2011-02-041-18/+5
| | | | | | | | | | Allow a live range to end with a kill flag, but don't allow a kill flag that doesn't end the live range. This makes the machine code verifier more useful during register allocation when kill flag computation is deferred. llvm-svn: 124838
* Verify slot index ordering.Jakob Stoklund Olesen2011-01-121-0/+25
| | | | | | The slot indexes must be monotonically increasing through the function. llvm-svn: 123324
* Verify that machine instruction parent pointers are consistent.Jakob Stoklund Olesen2011-01-121-0/+5
| | | | llvm-svn: 123322
* Replace TargetRegisterInfo::printReg with a PrintReg class that also works ↵Jakob Stoklund Olesen2011-01-091-2/+2
| | | | | | | | | | without a TRI instance. Print virtual registers numbered from 0 instead of the arbitrary FirstVirtualRegister. The first virtual register is printed as %vreg0. TRI::NoRegister is printed as %noreg. llvm-svn: 123107
* Fix a MachineVerifier loop that probably didn't mean to skip the last twoJakob Stoklund Olesen2011-01-081-2/+2
| | | | | | virtual registers. llvm-svn: 123100
* Simplify some code in MachineVerifier that was doing the correct thing, but notCameron Zwarich2010-12-281-10/+11
| | | | | | in the most obvious way. llvm-svn: 122610
* Add knowledge of phi-def and phi-kill valnos to MachineVerifier's predecessorCameron Zwarich2010-12-271-1/+17
| | | | | | | | | valno verification. The "Different value live out of predecessor" check is incorrect in the case of phi-def valnos, so just skip that check for phi-def valnos and instead check that all of the valnos for predecessors have phi-kill. Fixes PR8863. llvm-svn: 122581
* MachineVerifier should count landing pad successors as basic blocks rather thanCameron Zwarich2010-12-201-7/+9
| | | | | | out-edges. Fixes PR8824. llvm-svn: 122228
* Teach MachineVerifier that early clobber defs begin at USE slots and other defsCameron Zwarich2010-12-201-5/+26
| | | | | | begin at DEF slots. Fixes the second half of PR8813. llvm-svn: 122225
* Add a missing check from r122218.Cameron Zwarich2010-12-201-1/+1
| | | | llvm-svn: 122224
* Don't assume that an instruction ending a register's live range always readsCameron Zwarich2010-12-201-4/+18
| | | | | | the register; it may be a dead def instead. Fixes PR8820. llvm-svn: 122218
* Ignore debug values when performing MachineVerifier liveness checks. FixesCameron Zwarich2010-12-201-1/+3
| | | | | | PR8822. llvm-svn: 122207
* Early clobber operands are allowed to be defined at use indices. This fixes oneCameron Zwarich2010-12-191-1/+1
| | | | | | half of PR8813. llvm-svn: 122205
* Fix PR8811 by teaching MachineVerifier about optional defs.Cameron Zwarich2010-12-191-3/+3
| | | | llvm-svn: 122199
* Pass a Banner argument to the machine code verifier both fromJakob Stoklund Olesen2010-12-181-9/+16
| | | | | | | | createMachineVerifierPass and MachineFunction::verify. The banner is printed before the machine code dump, just like the printer pass. llvm-svn: 122113
* Allow missing kill flags on an untied operand of a two-address instruction whenJakob Stoklund Olesen2010-12-171-1/+6
| | | | | | | | | | | | | | the operand uses the same register as a tied operand: %r1 = add %r1, %r1 If add were a three-address instruction, kill flags would be required on at least one of the uses. Since it is a two-address instruction, the tied use operand must not have a kill flag. This change makes the kill flag on the untied use operand optional. llvm-svn: 122082
* Only avoid the check if we're the last operand before the variableEric Christopher2010-11-171-3/+3
| | | | | | operands in a variadic instruction. llvm-svn: 119446
* Make the verifier a little quieter on instructions that it's probablyEric Christopher2010-11-161-1/+3
| | | | | | (and likely) wrong about anyhow. llvm-svn: 119320
* Be more precise about verifying missing kill flags.Jakob Stoklund Olesen2010-11-011-2/+4
| | | | | | | It is legal for an instruction to have two operands using the same register, only one a kill. This is interpreted as a kill. llvm-svn: 117981
* Add kill flag verification.Jakob Stoklund Olesen2010-11-011-2/+13
| | | | | | | | At least X86FloatingPoint requires correct kill flags after register allocation, and targets using register scavenging benefit. Conservative kill flags are not enough. llvm-svn: 117960
* Add basic LiveStacks verification.Jakob Stoklund Olesen2010-11-011-0/+20
| | | | | | | When an instruction refers to a spill slot with a LiveStacks entry, check that the spill slot is live at the instruction. llvm-svn: 117944
* Disable more of physical register live intervals verification.Jakob Stoklund Olesen2010-10-301-2/+3
| | | | llvm-svn: 117762
* Print out the connected components in the verifier after complaining about theirJakob Stoklund Olesen2010-10-291-0/+8
| | | | | | multiplicity. llvm-svn: 117630
* One day, physical register live ranges will be sensible.Jakob Stoklund Olesen2010-10-281-0/+5
| | | | llvm-svn: 117602
* Physical registers trivially have multiple connected components all the time.Jakob Stoklund Olesen2010-10-271-5/+7
| | | | | | Only virtuals should be requires to be connected. llvm-svn: 117422
* Verify that live intervals are connected. If there are multiple connectedJakob Stoklund Olesen2010-10-261-1/+9
| | | | | | components, each should get its own virtual register. llvm-svn: 117407
* Teach MachineBasicBlock::print() to annotate instructions and blocks withJakob Stoklund Olesen2010-10-261-2/+11
| | | | | | SlotIndexes when available. llvm-svn: 117392
* Remmeber to print full live interval on verification error.Jakob Stoklund Olesen2010-10-261-4/+7
| | | | llvm-svn: 117391
* Don't verify physical registers going into landing pads.Jakob Stoklund Olesen2010-10-261-0/+8
| | | | | | Magic is happening that we don't understand. llvm-svn: 117370
* Verify LiveIntervals against the CFG, ensuring that live-in values are live-outJakob Stoklund Olesen2010-10-231-1/+77
| | | | | | of all predecessors. llvm-svn: 117191
* Add more verification of LiveIntervals.Jakob Stoklund Olesen2010-10-221-0/+29
| | | | llvm-svn: 117170
OpenPOWER on IntegriCloud